Struct stm32_metapac::dbgmcu::regs::Ahb1fzr

#[repr(transparent)]
pub struct Ahb1fzr(pub u32);

AHB1 peripheral freeze register

Tuple Fields

0: u32

Implementations

impl Ahb1fzr

pub const fn dbg_gpdma1_ch0_stop(&self) -> bool

GPDMA 1 channel 0 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC0.

pub fn set_dbg_gpdma1_ch0_stop(&mut self, val: bool)

GPDMA 1 channel 0 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC0.

pub const fn dbg_gpdma1_ch1_stop(&self) -> bool

GPDMA 1 channel 1 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC1.

pub fn set_dbg_gpdma1_ch1_stop(&mut self, val: bool)

GPDMA 1 channel 1 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC1.

pub const fn dbg_gpdma1_ch2_stop(&self) -> bool

GPDMA 1 channel 2 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC2.

pub fn set_dbg_gpdma1_ch2_stop(&mut self, val: bool)

GPDMA 1 channel 2 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC2.

pub const fn dbg_gpdma1_ch3_stop(&self) -> bool

GPDMA 1 channel 3 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC3.

pub fn set_dbg_gpdma1_ch3_stop(&mut self, val: bool)

GPDMA 1 channel 3 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC3.

pub const fn dbg_gpdma1_ch4_stop(&self) -> bool

GPDMA 1 channel 4 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC4.

pub fn set_dbg_gpdma1_ch4_stop(&mut self, val: bool)

GPDMA 1 channel 4 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC4.

pub const fn dbg_gpdma1_ch5_stop(&self) -> bool

GPDMA 1 channel 5 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC5.

pub fn set_dbg_gpdma1_ch5_stop(&mut self, val: bool)

GPDMA 1 channel 5 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC5.

pub const fn dbg_gpdma1_ch6_stop(&self) -> bool

GPDMA 1 channel 6 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC6.

pub fn set_dbg_gpdma1_ch6_stop(&mut self, val: bool)

GPDMA 1 channel 6 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC6.

pub const fn dbg_gpdma1_ch7_stop(&self) -> bool

GPDMA 1 channel 7 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC7.

pub fn set_dbg_gpdma1_ch7_stop(&mut self, val: bool)

GPDMA 1 channel 7 stop in CPU debug Write access can be protected by GPDMA_SECCFGR.SEC7.

Trait Implementations

impl Clone for Ahb1fzr

fn clone(&self) -> Ahb1fzr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Ahb1fzr

fn default() -> Ahb1fzr

Returns the “default value” for a type.

impl PartialEq for Ahb1fzr

fn eq(&self, other: &Ahb1fzr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ahb1fzr

impl Eq for Ahb1fzr

impl StructuralPartialEq for Ahb1fzr