Expand description
TSC Peripheral Interface
§Example (stm32)
ⓘ
let mut device_config = embassy_stm32::Config::default();
{
device_config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_4MHZ);
}
let context = embassy_stm32::init(device_config);
let config = tsc::Config {
ct_pulse_high_length: ChargeTransferPulseCycle::_2,
ct_pulse_low_length: ChargeTransferPulseCycle::_2,
spread_spectrum: false,
spread_spectrum_deviation: SSDeviation::new(2).unwrap(),
spread_spectrum_prescaler: false,
pulse_generator_prescaler: PGPrescalerDivider::_4,
max_count_value: MaxCount::_8191,
io_default_mode: false,
synchro_pin_polarity: false,
acquisition_mode: false,
max_count_interrupt: false,
channel_ios: TscIOPin::Group2Io2 | TscIOPin::Group7Io3,
shield_ios: TscIOPin::Group1Io3.into(),
sampling_ios: TscIOPin::Group1Io2 | TscIOPin::Group2Io1 | TscIOPin::Group7Io2,
};
let mut g1: PinGroup<embassy_stm32::peripherals::TSC, G1> = PinGroup::new();
g1.set_io2(context.PB13, PinType::Sample);
g1.set_io3(context.PB14, PinType::Shield);
let mut g2: PinGroup<embassy_stm32::peripherals::TSC, G2> = PinGroup::new();
g2.set_io1(context.PB4, PinType::Sample);
g2.set_io2(context.PB5, PinType::Channel);
let mut g7: PinGroup<embassy_stm32::peripherals::TSC, G7> = PinGroup::new();
g7.set_io2(context.PE3, PinType::Sample);
g7.set_io3(context.PE4, PinType::Channel);
let mut touch_controller = tsc::Tsc::new_blocking(
context.TSC,
Some(g1),
Some(g2),
None,
None,
None,
None,
Some(g7),
None,
config,
);
touch_controller.discharge_io(true);
Timer::after_millis(1).await;
touch_controller.start();
Re-exports§
pub use enums::*;
Modules§
- Enums defined for peripheral parameters
Structs§
- Peripheral configuration
- TSC interrupt handler.
- Pin group definition Pins are organized into groups of four IOs, all groups with a sampling channel must also have a sampling capacitor channel.
- TSC driver
- Pin struct that maintains usage
Enums§
- Error type defined for TSC
- Group 1 marker type.
- Group 2 marker type.
- Group 3 marker type.
- Group 4 marker type.
- Group 5 marker type.
- Group 6 marker type.
- Group 7 marker type.
- Group 8 marker type.
- Group identifier used to interrogate status
- Individual group status checked after acquisition reported as complete For groups with multiple channel pins, may take longer because acquisitions are done sequentially. Check this status before pulling count for each sampled channel
- Pin type definition to control IO parameters
- Peripheral state
Traits§
- G1IO1Pin pin trait
- G1IO2Pin pin trait
- G1IO3Pin pin trait
- G1IO4Pin pin trait
- G2IO1Pin pin trait
- G2IO2Pin pin trait
- G2IO3Pin pin trait
- G2IO4Pin pin trait
- G3IO1Pin pin trait
- G3IO2Pin pin trait
- G3IO3Pin pin trait
- G3IO4Pin pin trait
- G4IO1Pin pin trait
- G4IO2Pin pin trait
- G4IO3Pin pin trait
- G4IO4Pin pin trait
- G5IO1Pin pin trait
- G5IO2Pin pin trait
- G5IO3Pin pin trait
- G5IO4Pin pin trait
- G6IO1Pin pin trait
- G6IO2Pin pin trait
- G6IO3Pin pin trait
- G6IO4Pin pin trait
- G7IO1Pin pin trait
- G7IO2Pin pin trait
- G7IO3Pin pin trait
- G7IO4Pin pin trait
- G8IO1Pin pin trait
- G8IO2Pin pin trait
- G8IO3Pin pin trait
- G8IO4Pin pin trait
- TSC instance trait