Expand description
Type-level interrupt infrastructure.
This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.
As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts!
macro
to bind interrupts, and the [crate::interrupt
] module to manually register interrupt handlers and manipulate
interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)
Enums§
- ADC_COMP1 typelevel interrupt.
- DMA1_CH4_7_DMAMUX_OVR typelevel interrupt.
- DMA1_CHANNEL1 typelevel interrupt.
- DMA1_CHANNEL2_3 typelevel interrupt.
- EXTI0_1 typelevel interrupt.
- EXTI2_3 typelevel interrupt.
- EXTI4_15 typelevel interrupt.
- FLASH_ECC typelevel interrupt.
- I2C1 typelevel interrupt.
- I2C2_3 typelevel interrupt.
- PVD_PVM typelevel interrupt.
- RCC_CRS typelevel interrupt.
- RNG typelevel interrupt.
- RTC_TAMP typelevel interrupt.
- SPI1 typelevel interrupt.
- SPI2 typelevel interrupt.
- TIM2 typelevel interrupt.
- TIM3 typelevel interrupt.
- TIM1_BRK_UP_TRG_COM typelevel interrupt.
- TIM1_CC typelevel interrupt.
- TIM6_DAC_LPTIM1 typelevel interrupt.
- TIM7_LPTIM2 typelevel interrupt.
- TIM15 typelevel interrupt.
- TIM16 typelevel interrupt.
- TSC typelevel interrupt.
- USART1 typelevel interrupt.
- USART4 typelevel interrupt.
- USART2_LPUART2 typelevel interrupt.
- USART3_LPUART1 typelevel interrupt.
- WWDG_IWDG typelevel interrupt.
Traits§
- Compile-time assertion that an interrupt has been bound to a handler.
- Interrupt handler trait.
- Type-level interrupt.