Expand description
Type-level interrupt infrastructure.
This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.
As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts!
macro
to bind interrupts, and the [crate::interrupt
] module to manually register interrupt handlers and manipulate
interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)
Enums§
- ADC_COMP_DAC typelevel interrupt.
- AES_PKA typelevel interrupt.
- DMA1_CHANNEL1_2_3 typelevel interrupt.
- DMA1_CHANNEL4_5_6_7 typelevel interrupt.
- DMA2_DMAMUX1_OVR typelevel interrupt.
- EXTI1_0 typelevel interrupt.
- EXTI3_2 typelevel interrupt.
- EXTI15_4 typelevel interrupt.
- HSEM typelevel interrupt.
- I2C1 typelevel interrupt.
- I2C2 typelevel interrupt.
- I2C3 typelevel interrupt.
- IPCC_C2_RX_C2_TX typelevel interrupt.
- LPTIM1 typelevel interrupt.
- LPTIM2 typelevel interrupt.
- LPTIM3 typelevel interrupt.
- LPUART1 typelevel interrupt.
- PVD_PVM typelevel interrupt.
- RCC_FLASH_C1SEV typelevel interrupt.
- RNG typelevel interrupt.
- RTC_LSECSS typelevel interrupt.
- SPI1 typelevel interrupt.
- SPI2 typelevel interrupt.
- SUBGHZSPI typelevel interrupt.
- SUBGHZ_RADIO typelevel interrupt.
- TIM1 typelevel interrupt.
- TIM2 typelevel interrupt.
- TIM16 typelevel interrupt.
- TIM17 typelevel interrupt.
- TZIC_ILA typelevel interrupt.
- USART1 typelevel interrupt.
- USART2 typelevel interrupt.
Traits§
- Compile-time assertion that an interrupt has been bound to a handler.
- Interrupt handler trait.
- Type-level interrupt.