Expand description
§nxp-pac
This is a Peripheral Access Crate for NXP microcontrollers.
This crate has been automatically generated from the SVD files in NXP’s mcux-soc-svd repo, using chiptool. Fixes are added to the SVD file to make the crate more amenable to writing HALs with, such as converting sets of identical registers/fields to arrays, merging identical registers and enums, etc.
This crate will (hopefully) be used for embassy-nxp Rust Hardware Abstraction Layer (HAL) for the NXP microcontrollers.
§Cloning
If you want to regenerate the pac, you need to clone with --recursive.
If you forgot this, you can use git submodule update --checkout --init to fetch the submodules.
§License
The contents of this crate are auto-generated and licensed under the same terms as the underlying SVD file, which is licensed by NXP under a BSD-3-Clause license.
Modules§
- adc
- aoi
- can
- cdog
- cmc
- cmp
- common
- crc
- ctimer
- dac
- dbgmailbox
- dma
- edma_
0_ tcd - eim
- eqdc
- erm
- flexio
- flexpwm
- fmc
- fmu
- freqme
- glikey
- gpio
- i3c
- inputmux
- lpi2c
- lpspi
- lptmr
- lpuart
- mau
- mbc
- mrcc
- opamp
- ostimer
- pkc
- port
- rtc
- scg
- scn_scb
- sgi
- smartdma
- spc
- syscon
- tdet
- trng
- udf
- usb
- utick
- vbat
- waketimer
- wuu
- wwdt
Enums§
Constants§
- ADC0
- ADC
- ADC1
- ADC
- ADC2
- ADC3
- AOI0
- AOI
- AOI1
- AOI
- CAN0
- CAN
- CAN1
- CAN
- CDOG0
- CDOG
- CDOG1
- CDOG
- CMC
- CMC
- CMP0
- LPCMP
- CMP1
- LPCMP
- CRC0
- CRC
- CTIMER0
- Standard Counter or Timer
- CTIMER1
- Standard Counter or Timer
- CTIMER2
- Standard Counter or Timer
- CTIMER3
- Standard Counter or Timer
- CTIMER4
- Standard Counter or Timer
- DAC0
- 12-bit DAC
- DBGMAILBOX
- DBGMB
- DMA0
- DMA MP
- EDMA_
0_ TCD0 - DMA TCD
- EIM0
- Error Injection Module
- EQDC0
- Quadrature_Decoder
- EQDC1
- Quadrature_Decoder
- ERM0
- Error Reporting Module
- FLEXIO0
- Flexible I/O
- FLEXPW
M0 - PWM
- FLEXPW
M1 - PWM
- FMC0
- NPX
- FMU0
- Flash
- FREQME0
- FREQME
- GLIKEY0
- GLIKEY
- GPIO0
- GPIO
- GPIO1
- GPIO
- GPIO2
- GPIO
- GPIO3
- GPIO
- GPIO4
- GPIO
- I3C0
- Improved Inter-Integrated Circuit
- INPUTMU
X0 - INPUTMUX
- LPI2C0
- Low-Power Inter-Integrated Circuit
- LPI2C1
- Low-Power Inter-Integrated Circuit
- LPI2C2
- Low-Power Inter-Integrated Circuit
- LPI2C3
- Low-Power Inter-Integrated Circuit
- LPSPI0
- Low-Power Serial Peripheral Interface
- LPSPI1
- Low-Power Serial Peripheral Interface
- LPTMR0
- LPTMR
- LPUART0
- LPUART
- LPUART1
- LPUART
- LPUART2
- LPUART
- LPUART3
- LPUART
- LPUART4
- LPUART
- LPUART5
- MAU0
- MAUWRAP
- MBC0
- TRDC
- MRCC0
- MRCC
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority
- OPAMP0
- OPAMP
- OSTIME
R0 - OSTIMER
- PKC0
- no description available
- PORT0
- PORT
- PORT1
- PORT
- PORT2
- PORT
- PORT3
- PORT
- PORT4
- PORT
- RTC0
- RTC
- SCG0
- System Clock Generator
- SCNSCB
- System Control not in System Control Block
- SGI0
- no description available
- SMARTDM
A0 - Smart DMA Controller
- SPC0
- SPC
- SYSCON
- SYSCON
- TDET0
- TDET
- TRNG0
- pd_main.trng0
- UDF0
- no description available
- USB0
- USBFS
- UTICK0
- UTICK
- VBAT0
- VBAT
- WAKETIME
R0 - WAKE_TIMER
- WUU0
- Low-Leakage Wakeup Unit
- WWDT0
- WWDT