nxp-pac

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Crate nxp_pac

Crate nxp_pac 

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Expand description

§nxp-pac

This is a Peripheral Access Crate for NXP microcontrollers.

This crate has been automatically generated from the SVD files in NXP’s mcux-soc-svd repo, using chiptool. Fixes are added to the SVD file to make the crate more amenable to writing HALs with, such as converting sets of identical registers/fields to arrays, merging identical registers and enums, etc.

This crate will (hopefully) be used for embassy-nxp Rust Hardware Abstraction Layer (HAL) for the NXP microcontrollers.

§Cloning

If you want to regenerate the pac, you need to clone with --recursive.

If you forgot this, you can use git submodule update --checkout --init to fetch the submodules.

§License

The contents of this crate are auto-generated and licensed under the same terms as the underlying SVD file, which is licensed by NXP under a BSD-3-Clause license.

Modules§

adc
ahbsc
aoi
can
cdog
cmc
cmp
common
crc
ctimer
dac
dbgmailbox
dgdet
dma
dma1
edma0_tcd
edma1_tcd
edma_0_tcd
eim
enet
enet0__eqos_dma
enet0__eqos_dma_ch
enet0__eqos_mtl
enet0__eqos_mtl_q
erm
espi
ewm
flexio
flexspi
fmc
fmu
freqme
glikey
gpio
i3c
i3c1
inputmux
itrc
lpi2c
lpspi
lptmr
lpuart
mbc
mrcc
ostimer
pkc
port
rtc
scg
seccon
sgi
smartdma
spc
spi_filter
syscon
t1s
tdet
trng
tsi
udf
usb
usbnc
usbphy
utick
vbat
vref
waketimer
wuu
wwdt

Enums§

Interrupt
interrupt

Constants§

ADC0
ADC
ADC1
ADC
ADC2
ADC3
AHBSC
AHBSC
AOI0
AOI
CAN0
Flexible Data Rate CAN
CAN1
Flexible Data Rate CAN
CDOG0
Code Watchdog Timer
CDOG1
Code Watchdog Timer
CMC
Core Mode Controller
CMP0
LPCMP
CRC0
CRC
CTIMER0
Standard Counter or Timer
CTIMER1
Standard Counter or Timer
CTIMER2
Standard Counter or Timer
CTIMER3
Standard Counter or Timer
CTIMER4
Standard Counter or Timer
DAC0
12-bit DAC
DAC1
12-bit DAC
DBGMAILBOX
Debug Mailbox
DGDET0
no description available
DMA0
DMA MP
DMA1
DMA MP
EDMA0_TCD0
DMA TCD
EDMA1_TCD0
DMA TCD
EIM0
Error Injection Module
ENET0
no description available
ENET0__EQOS_DMA
no description available
ENET0__EQOS_DMA_CH0
no description available
ENET0__EQOS_MTL
no description available
ENET0__EQOS_MTL_Q0
no description available
ERM0
Error Reporting Module
ESPI0
Enhanced Serial Peripheral Interface
EWM
External Watchdog Monitor
FLEXIO0
Flexible I/O
FLEXSPI0
Flexible Serial Peripheral Interface
FMC0
FMC
FMU0
Flash
FREQME0
Frequency Measurement
GLIKEY0
GLIKEY
GPIO0
GPIO
GPIO1
GPIO
GPIO2
GPIO
GPIO3
GPIO
GPIO4
GPIO
GPIO5
GPIO
I3C0
Improved Inter-Integrated Circuit
I3C1
Improved Inter-Integrated Circuit
I3C2
Improved Inter-Integrated Circuit
I3C3
Improved Inter-Integrated Circuit
INPUTMUX0
INPUTMUX
ITRC0
ITRC
LPI2C0
Low-Power Inter-Integrated Circuit
LPI2C1
Low-Power Inter-Integrated Circuit
LPI2C2
Low-Power Inter-Integrated Circuit
LPI2C3
Low-Power Inter-Integrated Circuit
LPI2C4
Low-Power Inter-Integrated Circuit
LPSPI0
Low-Power Serial Peripheral Interface
LPSPI1
Low-Power Serial Peripheral Interface
LPSPI2
Low-Power Serial Peripheral Interface
LPSPI3
Low-Power Serial Peripheral Interface
LPSPI4
Low-Power Serial Peripheral Interface
LPSPI5
Low-Power Serial Peripheral Interface
LPTMR0
LPTMR
LPUART0
LPUART
LPUART1
LPUART
LPUART2
LPUART
LPUART3
LPUART
LPUART4
LPUART
LPUART5
LPUART
MBC0
TRDC
MRCC0
MRCC
NVIC_PRIO_BITS
Number available in the NVIC for configuring priority
OSTIMER0
OS Event Timer
PKC0
no description available
PORT0
Port Control
PORT1
Port Control
PORT2
Port Control
PORT3
Port Control
PORT4
Port Control
PORT5
Port Control
RTC0
Real Time Clock
SCG0
System Clock Generator
SECCON
SECCON
SGI0
no description available
SMARTDMA
Smart DMA Controller
SPC0
System Power Control
SPI_FILTER
SPI FILTER
SYSCON
SYSCON
T1S0
TENBASET_PHY
TDET0
TDET
TRNG0
pd_main.trng0
TSI0
DA_IP_TSI_UG_3V_CLN40ULP
UDF0
no description available
USB0
USBC
USBNC
USBNC
USBPHY0
Universal Serial Bus 2.0 Integrated PHY
UTICK0
Micro-Tick Timer
VBAT0
VBAT
VREF0
Voltage Reference
WAKETIMER0
WAKE_TIMER
WUU0
Low-Leakage Wakeup Unit
WWDT0
Windowed Watchdog Timer
WWDT1
Windowed Watchdog Timer

Attribute Macros§

interrupt