nxp-pac

Crates

git

Versions

mcxa577

Flavors

Module inputmux

Module inputmux 

Source
Expand description

Peripheral access API (generated using chiptool v0.1.0 (e5ab29f 2026-04-30))

Structs§

AdcTrig
ADC Trigger input connections.
Aoi0Input
AOI0 trigger input connections 0.
CmpTrig
CMP0 input connections.
Ctimer0cap
Capture select register for CTIMER inputs.
Ctimer0capInp
Ctimer1cap
Capture select register for CTIMER inputs.
Ctimer1capInp
Ctimer2cap
Capture select register for CTIMER inputs.
Ctimer2capInp
Ctimer3cap
Capture select register for CTIMER inputs.
Ctimer3capInp
Ctimer4cap
Capture select register for CTIMER inputs.
Ctimer4capInp
DacTrig
DAC0 trigger.
DacTrigTrigin
FlexioTrig
FlexIO Trigger Input Connections.
FreqmeasRef
Selection for frequency measurement reference clock.
FreqmeasRefInp
FreqmeasTar
Selection for frequency measurement reference clock.
FreqmeasTarInp
Inputmux
INPUTMUX.
Lpi2cTrig
LPI2C0 trigger input connections.
LpspiTrig
LPSPI0 trigger input connections.
Lpuart
LPUART0 trigger input connections.
SmartDmaTrig
SmartDMA Trigger Input Connections.
Timer0trig
Trigger register for TIMER0.
Timer0trigInp
Timer1trig
Trigger register for TIMER1.
Timer1trigInp
Timer2trig
Trigger register for TIMER2 inputs.
Timer2trigInp
Timer3trig
Trigger register for TIMER3.
Timer3trigInp
Timer4trig
Trigger register for TIMER4.
Timer4trigInp
TrigOut
EXT trigger connections.
Tsi0TrigInput
TSI0 trigger input connections.

Enums§

AdcTrigTrigin
AoiInputInp
CmpTrigTrigin
FlexioTrigInp
Lpi2cTrigInp
LpspiTrigInp
LpuartInp
SmartDmaTrigInp
TrigOutInp
Tsi0TrigInputInp