nxp-pac

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Crate nxp_pac

Crate nxp_pac 

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§nxp-pac

This is a Peripheral Access Crate for NXP microcontrollers.

This crate has been automatically generated from the SVD files in NXP’s mcux-soc-svd repo, using chiptool. Fixes are added to the SVD file to make the crate more amenable to writing HALs with, such as converting sets of identical registers/fields to arrays, merging identical registers and enums, etc.

This crate will (hopefully) be used for embassy-nxp Rust Hardware Abstraction Layer (HAL) for the NXP microcontrollers.

§Cloning

If you want to regenerate the pac, you need to clone with --recursive.

If you forgot this, you can use git submodule update --checkout --init to fetch the submodules.

§License

The contents of this crate are auto-generated and licensed under the same terms as the underlying SVD file, which is licensed by NXP under a BSD-3-Clause license.

Modules§

adc
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
cdog
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
cmc
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
common
crc
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
ctimer
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
dma
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
edma_tcd
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
flexpwm
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
fmu
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
gpio
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
i3c
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
inputmux
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
lpi2c
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
lpspi
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
lpuart
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
mrcc
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
ostimer
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
port
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
rtc2xx
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
scg
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
sgi
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
spc
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
syscon
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
trng
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
vbat
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))
wwdt
Peripheral access API (generated using chiptool v0.1.0 (859f02b 2026-04-15))

Enums§

Interrupt
interrupt

Constants§

ADC0
ADC1
CDOG0
CDOG1
CMC
CRC0
CTIMER0
CTIMER1
CTIMER2
CTIMER3
CTIMER4
DMA0
EDMA_0_TCD
FLEX_PWM0
FLEX_PWM1
FMU0
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
I3C0
INPUTMUX0
LPI2C0
LPI2C1
LPI2C2
LPI2C3
LPSPI0
LPSPI1
LPUART0
LPUART1
LPUART2
LPUART3
LPUART4
LPUART5
MRCC0
NVIC_PRIO_BITS
Number available in the NVIC for configuring priority
OSTIMER0
PORT0
PORT1
PORT2
PORT3
PORT4
RTC0
SCG0
SGI0
SPC0
SYSCON
TRNG0
VBAT0
WWDT0

Attribute Macros§

interrupt