Module mrcc 

Peripheral access API (generated using chiptool v0.1.0 (2fd28c5 2026-04-02))

Structs

CmpFuncClkdiv

CMP0_FUNC clock divider control.

CmpRrClkdiv

CMP0_RR clock divider control.

CmpRrClksel

CMP0_RR clock selection control.

CtimerClkdiv

CTIMER0 clock divider control.

CtimerClksel

CTIMER0 clock selection control.

DacClkdiv

DAC0 clock divider control.

DacClksel

DAC0 clock selection control.

FlexcanClkdiv

FLEXCAN0 clock divider control.

FlexcanClksel

FLEXCAN0 clock selection control.

FlexioClkdiv

FLEXIO0 clock divider control.

FlexioClksel

FLEXIO0 clock selection control.

GlbCcClr

AHB Clock Control Clear 0.

GlbCcSet

AHB Clock Control Set 0.

GlbRstClr

Peripheral Reset Control Clear 0.

GlbRstSet

Peripheral Reset Control Set 0.

I3cFclkClkdiv

I3C0_FCLK clock divider control.

I3cFclkClksel

I3C0_FCLK clock selection control.

Lpi2cClkdiv

LPI2C0 clock divider control.

Lpi2cClksel

LPI2C0 clock selection control.

LpspiClkdiv

LPSPI0 clock divider control.

LpspiClksel

LPSPI0 clock selection control.

LptmrClkdiv

LPTMR0 clock divider control.

LptmrClksel

LPTMR0 clock selection control.

LpuartClkdiv

LPUART0 clock divider control.

LpuartClksel

LPUART0 clock selection control.

Mrcc

MRCC.

MrccAdcClkdiv

ADCx clock divider control.

MrccAdcClksel

ADCx clock selection control.

MrccClkoutClkdiv

CLKOUT clock divider control.

MrccClkoutClksel

CLKOUT clock selection control.

MrccDbgTraceClkdiv

DBG_TRACE clock divider control.

MrccDbgTraceClksel

DBG_TRACE clock selection control.

MrccGlbAcc0

Control Automatic Clock Gating 0.

MrccGlbAcc1

Control Automatic Clock Gating 1.

MrccGlbAcc2

Control Automatic Clock Gating 2.

MrccGlbCc0

AHB Clock Control 0.

MrccGlbCc1

AHB Clock Control 1.

MrccGlbCc2

AHB Clock Control 2.

MrccGlbRst0

Peripheral Reset Control 0.

MrccGlbRst1

Peripheral Reset Control 1.

MrccGlbRst2

Peripheral Reset Control 2.

MrccSystickClkdiv

SYSTICK clock divider control.

MrccSystickClksel

SYSTICK clock selection control.

OstimerClksel

OSTIMER0 clock selection control.

UsbClkdiv

USB0 clock divider control.

UsbClksel

USB0 clock selection control.

WwdtClkdiv

WWDT0 clock divider control.

Enums

AdcClkselMux

ClkdivHalt

ClkdivReset

ClkdivUnstab

ClkoutClkselMux

CtimerClkselMux

DacClkselMux

DbgTraceClkselMux

FclkClkselMux

FlexcanClkselMux

FlexioClkselMux

Lpi2cClkselMux

LpspiClkselMux

LptmrClkselMux

LpuartClkselMux

OstimerClkselMux

RrClkselMux

SystickClkselMux

UsbClkselMux