Enum Interrupt 

pub enum Interrupt {
    CMC = 1,
    DMA0_CH0 = 2,
    DMA0_CH1 = 3,
    DMA0_CH2 = 4,
    DMA0_CH3 = 5,
    DMA0_CH4 = 6,
    DMA0_CH5 = 7,
    DMA0_CH6 = 8,
    DMA0_CH7 = 9,
    ERM0_SINGLE_BIT = 10,
    ERM0_MULTI_BIT = 11,
    FMU0 = 12,
    GLIKEY0 = 13,
    MBC0 = 14,
    SCG0 = 15,
    SPC0 = 16,
    TDET = 17,
    WUU0 = 18,
    CAN0 = 19,
    CAN1 = 20,
    FLEXIO = 23,
    I3C0 = 24,
    I3C1 = 25,
    LPI2C0 = 26,
    LPI2C1 = 27,
    LPSPI0 = 28,
    LPSPI1 = 29,
    LPSPI2 = 30,
    LPUART0 = 31,
    LPUART1 = 32,
    LPUART2 = 33,
    LPUART3 = 34,
    LPUART4 = 35,
    CDOG0 = 38,
    CTIMER0 = 39,
    CTIMER1 = 40,
    CTIMER2 = 41,
    CTIMER3 = 42,
    CTIMER4 = 43,
    FREQME0 = 54,
    LPTMR0 = 55,
    OS_EVENT = 57,
    WAKETIMER0 = 58,
    UTICK0 = 59,
    WWDT0 = 60,
    WWDT1 = 61,
    ADC0 = 62,
    ADC1 = 63,
    CMP0 = 64,
    DAC0 = 67,
    DAC1 = 68,
    GPIO0 = 71,
    GPIO1 = 72,
    GPIO2 = 73,
    GPIO3 = 74,
    GPIO4 = 75,
    GPIO5 = 76,
    LPI2C2 = 77,
    LPI2C3 = 78,
    ESPI = 89,
    ETHERNET = 90,
    ETHERNET_PMT = 91,
    TENBASET_PHY0 = 93,
    I3C2 = 94,
    LPUART5 = 95,
    LPSPI3 = 97,
    LPSPI4 = 98,
    LPSPI5 = 99,
    LPI2C4 = 100,
    I3C3 = 101,
    FLEXSPI0 = 106,
    CDOG1 = 109,
    PKC = 110,
    SGI = 111,
    SPI_FILTER = 112,
    TRNG0 = 113,
    SECURE_ERR = 114,
    RTC = 119,
    TSI_END_OF_SCAN = 124,
    TSI_OUT_OF_SCAN = 125,
    GPIO0_1 = 126,
    GPIO1_1 = 127,
    GPIO2_1 = 128,
    GPIO3_1 = 129,
    GPIO4_1 = 130,
    GPIO5_1 = 131,
    ITRC0 = 133,
    DMA0_CH8 = 134,
    DMA0_CH9 = 135,
    DMA0_CH10 = 136,
    DMA0_CH11 = 137,
    DMA1_CH0 = 142,
    DMA1_CH1 = 143,
    DMA1_CH2 = 144,
    DMA1_CH3 = 145,
}

Variants

CMC = 1

1 - CMC

DMA0_CH0 = 2

2 - DMA0_CH0

DMA0_CH1 = 3

3 - DMA0_CH1

DMA0_CH2 = 4

4 - DMA0_CH2

DMA0_CH3 = 5

5 - DMA0_CH3

DMA0_CH4 = 6

6 - DMA0_CH4

DMA0_CH5 = 7

7 - DMA0_CH5

DMA0_CH6 = 8

8 - DMA0_CH6

DMA0_CH7 = 9

9 - DMA0_CH7

ERM0_SINGLE_BIT = 10

10 - ERM0_SINGLE_BIT

ERM0_MULTI_BIT = 11

11 - ERM0_MULTI_BIT

FMU0 = 12

12 - FMU0

GLIKEY0 = 13

13 - GLIKEY0

MBC0 = 14

14 - MBC0

SCG0 = 15

15 - SCG0

SPC0 = 16

16 - SPC0

TDET = 17

17 - TDET

WUU0 = 18

18 - WUU0

CAN0 = 19

19 - CAN0

CAN1 = 20

20 - CAN1

FLEXIO = 23

23 - FLEXIO

I3C0 = 24

24 - I3C0

I3C1 = 25

25 - I3C1

LPI2C0 = 26

26 - LPI2C0

LPI2C1 = 27

27 - LPI2C1

LPSPI0 = 28

28 - LPSPI0

LPSPI1 = 29

29 - LPSPI1

LPSPI2 = 30

30 - LPSPI2

LPUART0 = 31

31 - LPUART0

LPUART1 = 32

32 - LPUART1

LPUART2 = 33

33 - LPUART2

LPUART3 = 34

34 - LPUART3

LPUART4 = 35

35 - LPUART4

CDOG0 = 38

38 - CDOG0

CTIMER0 = 39

39 - CTIMER0

CTIMER1 = 40

40 - CTIMER1

CTIMER2 = 41

41 - CTIMER2

CTIMER3 = 42

42 - CTIMER3

CTIMER4 = 43

43 - CTIMER4

FREQME0 = 54

54 - FREQME0

LPTMR0 = 55

55 - LPTMR0

OS_EVENT = 57

57 - OS_EVENT

WAKETIMER0 = 58

58 - WAKETIMER0

UTICK0 = 59

59 - UTICK0

WWDT0 = 60

60 - WWDT0

WWDT1 = 61

61 - WWDT1

ADC0 = 62

62 - ADC0

ADC1 = 63

63 - ADC1

CMP0 = 64

64 - CMP0

DAC0 = 67

67 - DAC0

DAC1 = 68

68 - DAC1

GPIO0 = 71

71 - GPIO0

GPIO1 = 72

72 - GPIO1

GPIO2 = 73

73 - GPIO2

GPIO3 = 74

74 - GPIO3

GPIO4 = 75

75 - GPIO4

GPIO5 = 76

76 - GPIO5

LPI2C2 = 77

77 - LPI2C2

LPI2C3 = 78

78 - LPI2C3

ESPI = 89

89 - ESPI

ETHERNET = 90

90 - ETHERNET

ETHERNET_PMT = 91

91 - ETHERNET_PMT

TENBASET_PHY0 = 93

93 - TENBASET_PHY0

I3C2 = 94

94 - I3C2

LPUART5 = 95

95 - LPUART5

LPSPI3 = 97

97 - LPSPI3

LPSPI4 = 98

98 - LPSPI4

LPSPI5 = 99

99 - LPSPI5

LPI2C4 = 100

100 - LPI2C4

I3C3 = 101

101 - I3C3

FLEXSPI0 = 106

106 - FLEXSPI0

CDOG1 = 109

109 - CDOG1

PKC = 110

110 - PKC

SGI = 111

111 - SGI

SPI_FILTER = 112

112 - SPI_FILTER

TRNG0 = 113

113 - TRNG0

SECURE_ERR = 114

114 - SECURE_ERR

RTC = 119

119 - RTC

TSI_END_OF_SCAN = 124

124 - TSI_END_OF_SCAN

TSI_OUT_OF_SCAN = 125

125 - TSI_OUT_OF_SCAN

GPIO0_1 = 126

126 - GPIO0_1

GPIO1_1 = 127

127 - GPIO1_1

GPIO2_1 = 128

128 - GPIO2_1

GPIO3_1 = 129

129 - GPIO3_1

GPIO4_1 = 130

130 - GPIO4_1

GPIO5_1 = 131

131 - GPIO5_1

ITRC0 = 133

133 - ITRC0

DMA0_CH8 = 134

134 - DMA0_CH8

DMA0_CH9 = 135

135 - DMA0_CH9

DMA0_CH10 = 136

136 - DMA0_CH10

DMA0_CH11 = 137

137 - DMA0_CH11

DMA1_CH0 = 142

142 - DMA1_CH0

DMA1_CH1 = 143

143 - DMA1_CH1

DMA1_CH2 = 144

144 - DMA1_CH2

DMA1_CH3 = 145

145 - DMA1_CH3

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt