Module regs
Source - Backendpwr
- Power control
- Blksiz
- Block Size register
- Bmod
- Bus Mode register
- Bufaddr
- Current Buffer Descriptor Address register
- Bytcnt
- Byte Count register
- Cardthrctl
- Card Threshold Control
- Cdetect
- Card Detect register
- Clkdiv
- Clock Divider register
- Clkena
- Clock Enable register
- Cmd
- Command register
- Cmdarg
- Command Argument register
- Ctrl
- Control register
- Ctype
- Card Type register
- Dbaddr
- Descriptor List Base Address register
- Debnce
- Debounce Count register
- Dscaddr
- Current Host Descriptor Address register
- Fifo
- SDIF FIFO
- Fifoth
- FIFO Threshold Watermark register
- Idinten
- Internal DMAC Interrupt Enable register
- Idsts
- Internal DMAC Status register
- Intmask
- Interrupt Mask register
- Mintsts
- Masked Interrupt Status register
- Pldmnd
- Poll Demand register
- Pwren
- Power Enable register
- Resp
- Response register
- Rintsts
- Raw Interrupt Status register
- RstN
- Hardware Reset
- Status
- Status register
- Tbbcnt
- Transferred Host to BIU-FIFO Byte Count register
- Tcbcnt
- Transferred CIU Card Byte Count register
- Tmout
- Time-out register
- Wrtprt
- Write Protect register