Module regs
Source - Cbt
- CAN Bit Timing
- Crcr
- Cyclic Redundancy Check
- Cs
- Message Buffer 0 CS Register
- Ctrl1
- Control 1
- Ctrl2
- Control 2
- Ctrl1Pn
- Pretended Networking Control 1
- Ctrl2Pn
- Pretended Networking Control 2
- Ecr
- Error Counter
- Edcbt
- Enhanced Data Phase CAN Bit Timing
- Encbt
- Enhanced Nominal CAN Bit Timing
- Eprs
- Enhanced CAN Bit Timing Prescalers
- Erfcr
- Enhanced RX FIFO Control
- Erffel
- Enhanced RX FIFO Filter Element
- Erfier
- Enhanced RX FIFO Interrupt Enable
- Erfsr
- Enhanced RX FIFO Status
- Esr1
- Error and Status 1
- Esr2
- Error and Status 2
- Etdc
- Enhanced Transceiver Delay Compensation
- Fdcbt
- CAN FD Bit Timing
- Fdcrc
- CAN FD CRC
- Fdctrl
- CAN FD Control
- FltDlc
- Pretended Networking Data Length Code (DLC) Filter
- FltId1
- Pretended Networking ID Filter 1
- FltId2Idmask
- Pretended Networking ID Filter 2 or ID Mask
- Id
- Message Buffer 0 ID Register
- Iflag1
- Interrupt Flags 1
- Imask1
- Interrupt Masks 1
- MbbCs
- Message Buffer 0 CS Register
- MbbId
- Message Buffer 0 ID Register
- Mcr
- Module Configuration
- Pl1Hi
- Pretended Networking Payload High Filter 1
- Pl1Lo
- Pretended Networking Payload Low Filter 1
- Pl2PlmaskHi
- Pretended Networking Payload High Filter 2 and Payload High Mask
- Pl2PlmaskLo
- Pretended Networking Payload Low Filter 2 and Payload Low Mask
- Rx14mask
- Receive 14 Mask
- Rx15mask
- Receive 15 Mask
- Rxfgmask
- Legacy RX FIFO Global Mask
- Rxfir
- Legacy RX FIFO Information
- Rximr
- Receive Individual Mask
- Rxmgmask
- RX Message Buffers Global Mask
- Timer
- Free-Running Timer
- WmbCs
- Wake-Up Message Buffer
- WmbD03
- Wake-Up Message Buffer for Data 0-3
- WmbD47
- Wake-Up Message Buffer Register Data 4-7
- WmbId
- Wake-Up Message Buffer for ID
- WuMtc
- Pretended Networking Wake-Up Match