Structsยง
- Dtsrcsel
- PWM Source Select Register
- Fctrl0
- Fault Control Register
- Fctrl20
- Fault Control 2 Register
- Ffilt0
- Fault Filter Register
- Fsts0
- Fault Status Register
- Ftst0
- Fault Test Register
- Mask
- Mask Register
- Mctrl
- Master Control Register
- Mctrl2
- Master Control 2 Register
- Outen
- Output Enable Register
- Smcaptcompx
- Capture Compare X Register
- Smcaptctrlx
- Capture Control X Register
- Smcaptfiltx
- Capture PWM_X Input Filter Register
- Smcnt
- Counter Register
- Smctrl
- Control Register
- Smctrl2
- Control 2 Register
- Smcval0
- Capture Value 0 Register
- Smcval0cyc
- Capture Value 0 Cycle Register
- Smcval1
- Capture Value 1 Register
- Smcval1cyc
- Capture Value 1 Cycle Register
- Smdismap0
- Fault Disable Mapping Register 0
- Smdmaen
- DMA Enable Register
- Smdtcnt0
- Deadtime Count Register 0
- Smdtcnt1
- Deadtime Count Register 1
- Sminit
- Initial Count Register
- Sminten
- Interrupt Enable Register
- Smoctrl
- Output Control Register
- Smphasedly
- Phase Delay Register
- Smsts
- Status Register
- Smtctrl
- Output Trigger Control Register
- Smval
- Value Register 0
- Swcout
- Software Controlled Output Register