nxp-pac

Crates

git

Versions

mimxrt685s_cm33

Flavors

Module vals

Module vals 

Source

Enumsยง

Cm33LockRegLock
Flexspi0Region0RuleRule0
Flexspi0Region0RuleRule1
Flexspi0Region0RuleRule2
Flexspi0Region0RuleRule3
Flexspi0Region0RuleRule4
Flexspi0Region0RuleRule5
Flexspi0Region0RuleRule6
Flexspi0Region0RuleRule7
Flexspi0Region1Rule0Rule0
Flexspi0Region1Rule0Rule1
Flexspi0Region1Rule0Rule2
Flexspi0Region1Rule0Rule3
Flexspi0Region2Rule0Rule0
Flexspi0Region2Rule0Rule1
Flexspi0Region2Rule0Rule2
Flexspi0Region2Rule0Rule3
Flexspi0Region3Rule0Rule0
Flexspi0Region3Rule0Rule1
Flexspi0Region3Rule0Rule2
Flexspi0Region3Rule0Rule3
Flexspi0Region4Rule0Rule0
Flexspi0Region4Rule0Rule1
Flexspi0Region4Rule0Rule2
Flexspi0Region4Rule0Rule3
LockNsMpu
LockNsVtor
LockSMpu
LockSVtor
LockSau
MasterSecLevelAntiPolDma0Sec
MasterSecLevelAntiPolDma1Sec
MasterSecLevelAntiPolDspSec
MasterSecLevelAntiPolPowerquadSec
MasterSecLevelAntiPolSdio0Sec
MasterSecLevelAntiPolSdio1Sec
MasterSecLevelAntiPoleLock
MasterSecLevelDma0Sec
MasterSecLevelDma1Sec
MasterSecLevelDspSec
MasterSecLevelLock
MasterSecLevelPowerquadSec
MasterSecLevelSdio0Sec
MasterSecLevelSdio1Sec
MiscCtrlDpRegDisableSimpleMasterStrictMode
MiscCtrlDpRegDisableSmartMasterStrictMode
MiscCtrlDpRegDisableViolationAbort
MiscCtrlDpRegEnableNsPrivCheck
MiscCtrlDpRegEnableSPrivCheck
MiscCtrlDpRegEnableSecureChecking
MiscCtrlDpRegIdauAllNs
MiscCtrlDpRegWriteLock
MiscCtrlRegDisableSimpleMasterStrictMode
MiscCtrlRegDisableSmartMasterStrictMode
MiscCtrlRegDisableViolationAbort
MiscCtrlRegEnableNsPrivCheck
MiscCtrlRegEnableSPrivCheck
MiscCtrlRegEnableSecureChecking
MiscCtrlRegIdauAllNs
MiscCtrlRegWriteLock
Ram00RuleRule0
Ram00RuleRule1
Ram00RuleRule2
Ram00RuleRule3
Ram00RuleRule4
Ram00RuleRule5
Ram00RuleRule6
Ram00RuleRule7
Ram01RuleRule0
Ram01RuleRule1
Ram01RuleRule2
Ram01RuleRule3
Ram01RuleRule4
Ram01RuleRule5
Ram01RuleRule6
Ram01RuleRule7
Ram02RuleRule0
Ram02RuleRule1
Ram02RuleRule2
Ram02RuleRule3
Ram02RuleRule4
Ram02RuleRule5
Ram02RuleRule6
Ram02RuleRule7
Ram03RuleRule0
Ram03RuleRule1
Ram03RuleRule2
Ram03RuleRule3
Ram03RuleRule4
Ram03RuleRule5
Ram03RuleRule6
Ram03RuleRule7
Ram04RuleRule0
Ram04RuleRule1
Ram04RuleRule2
Ram04RuleRule3
Ram04RuleRule4
Ram04RuleRule5
Ram04RuleRule6
Ram04RuleRule7
Ram05RuleRule0
Ram05RuleRule1
Ram05RuleRule2
Ram05RuleRule3
Ram05RuleRule4
Ram05RuleRule5
Ram05RuleRule6
Ram05RuleRule7
Ram06RuleRule0
Ram06RuleRule1
Ram06RuleRule2
Ram06RuleRule3
Ram06RuleRule4
Ram06RuleRule5
Ram06RuleRule6
Ram06RuleRule7
Ram07RuleRule0
Ram07RuleRule1
Ram07RuleRule2
Ram07RuleRule3
Ram07RuleRule4
Ram07RuleRule5
Ram07RuleRule6
Ram07RuleRule7
Ram08RuleRule0
Ram08RuleRule1
Ram08RuleRule2
Ram08RuleRule3
Ram08RuleRule4
Ram08RuleRule5
Ram08RuleRule6
Ram08RuleRule7
Ram09RuleRule0
Ram09RuleRule1
Ram09RuleRule2
Ram09RuleRule3
Ram09RuleRule4
Ram09RuleRule5
Ram09RuleRule6
Ram09RuleRule7
Ram10RuleRule0
Ram10RuleRule1
Ram10RuleRule2
Ram10RuleRule3
Ram10RuleRule4
Ram10RuleRule5
Ram10RuleRule6
Ram10RuleRule7
Ram11RuleRule0
Ram11RuleRule1
Ram11RuleRule2
Ram11RuleRule3
Ram11RuleRule4
Ram11RuleRule5
Ram11RuleRule6
Ram11RuleRule7
Ram12RuleRule0
Ram12RuleRule1
Ram12RuleRule2
Ram12RuleRule3
Ram12RuleRule4
Ram12RuleRule5
Ram12RuleRule6
Ram12RuleRule7
Ram13RuleRule0
Ram13RuleRule1
Ram13RuleRule2
Ram13RuleRule3
Ram13RuleRule4
Ram13RuleRule5
Ram13RuleRule6
Ram13RuleRule7
Ram14RuleRule0
Ram14RuleRule1
Ram14RuleRule2
Ram14RuleRule3
Ram14RuleRule4
Ram14RuleRule5
Ram14RuleRule6
Ram14RuleRule7
Ram15RuleRule0
Ram15RuleRule1
Ram15RuleRule2
Ram15RuleRule3
Ram15RuleRule4
Ram15RuleRule5
Ram15RuleRule6
Ram15RuleRule7
Ram16RuleRule0
Ram16RuleRule1
Ram16RuleRule2
Ram16RuleRule3
Ram16RuleRule4
Ram16RuleRule5
Ram16RuleRule6
Ram16RuleRule7
Ram17RuleRule0
Ram17RuleRule1
Ram17RuleRule2
Ram17RuleRule3
Ram17RuleRule4
Ram17RuleRule5
Ram17RuleRule6
Ram17RuleRule7
Ram18RuleRule0
Ram18RuleRule1
Ram18RuleRule2
Ram18RuleRule3
Ram18RuleRule4
Ram18RuleRule5
Ram18RuleRule6
Ram18RuleRule7
Ram19RuleRule0
Ram19RuleRule1
Ram19RuleRule2
Ram19RuleRule3
Ram19RuleRule4
Ram19RuleRule5
Ram19RuleRule6
Ram19RuleRule7
Ram20RuleRule0
Ram20RuleRule1
Ram20RuleRule2
Ram20RuleRule3
Ram20RuleRule4
Ram20RuleRule5
Ram20RuleRule6
Ram20RuleRule7
Ram21RuleRule0
Ram21RuleRule1
Ram21RuleRule2
Ram21RuleRule3
Ram21RuleRule4
Ram21RuleRule5
Ram21RuleRule6
Ram21RuleRule7
Ram22RuleRule0
Ram22RuleRule1
Ram22RuleRule2
Ram22RuleRule3
Ram22RuleRule4
Ram22RuleRule5
Ram22RuleRule6
Ram22RuleRule7
Ram23RuleRule0
Ram23RuleRule1
Ram23RuleRule2
Ram23RuleRule3
Ram23RuleRule4
Ram23RuleRule5
Ram23RuleRule6
Ram23RuleRule7
Ram24RuleRule0
Ram24RuleRule1
Ram24RuleRule2
Ram24RuleRule3
Ram24RuleRule4
Ram24RuleRule5
Ram24RuleRule6
Ram24RuleRule7
Ram25RuleRule0
Ram25RuleRule1
Ram25RuleRule2
Ram25RuleRule3
Ram25RuleRule4
Ram25RuleRule5
Ram25RuleRule6
Ram25RuleRule7
Ram26RuleRule0
Ram26RuleRule1
Ram26RuleRule2
Ram26RuleRule3
Ram26RuleRule4
Ram26RuleRule5
Ram26RuleRule6
Ram26RuleRule7
Ram27RuleRule0
Ram27RuleRule1
Ram27RuleRule2
Ram27RuleRule3
Ram27RuleRule4
Ram27RuleRule5
Ram27RuleRule6
Ram27RuleRule7
Ram28RuleRule0
Ram28RuleRule1
Ram28RuleRule2
Ram28RuleRule3
Ram28RuleRule4
Ram28RuleRule5
Ram28RuleRule6
Ram28RuleRule7
Ram29RuleRule0
Ram29RuleRule1
Ram29RuleRule2
Ram29RuleRule3
Ram29RuleRule4
Ram29RuleRule5
Ram29RuleRule6
Ram29RuleRule7
RomMemRuleRule0
RomMemRuleRule1
RomMemRuleRule2
RomMemRuleRule3
RomMemRuleRule4
RomMemRuleRule5
RomMemRuleRule6
RomMemRuleRule7
SecDspIntLock
SecGpioMask0Lock
SecGpioMask1Lock
SecGpioMask2Lock
SecGpioMask3Lock
SecGpioMask4Lock
SecGpioMask5Lock
SecGpioMask6Lock
SecGpioMask7Lock