Struct rp_pac::i2c::regs::IcFsSclLcnt
source · #[repr(transparent)]pub struct IcFsSclLcnt(pub u32);
Expand description
Fast Mode or Fast Mode Plus I2C Clock SCL Low Count Register
Tuple Fields§
§0: u32
Implementations§
source§impl IcFsSclLcnt
impl IcFsSclLcnt
sourcepub const fn ic_fs_scl_lcnt(&self) -> u16
pub const fn ic_fs_scl_lcnt(&self) -> u16
This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for fast speed. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to ‘IC_CLK Frequency Configuration’. This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. The minimum valid value is 8; hardware prevents values less than this being written, and if attempted results in 8 being set. For designs with APB_DATA_WIDTH = 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed. If the value is less than 8 then the count value gets changed to 8.
sourcepub fn set_ic_fs_scl_lcnt(&mut self, val: u16)
pub fn set_ic_fs_scl_lcnt(&mut self, val: u16)
This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for fast speed. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to ‘IC_CLK Frequency Configuration’. This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. The minimum valid value is 8; hardware prevents values less than this being written, and if attempted results in 8 being set. For designs with APB_DATA_WIDTH = 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed. If the value is less than 8 then the count value gets changed to 8.
Trait Implementations§
source§impl Clone for IcFsSclLcnt
impl Clone for IcFsSclLcnt
source§fn clone(&self) -> IcFsSclLcnt
fn clone(&self) -> IcFsSclLcnt
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Default for IcFsSclLcnt
impl Default for IcFsSclLcnt
source§fn default() -> IcFsSclLcnt
fn default() -> IcFsSclLcnt
source§impl PartialEq for IcFsSclLcnt
impl PartialEq for IcFsSclLcnt
impl Copy for IcFsSclLcnt
impl Eq for IcFsSclLcnt
impl StructuralPartialEq for IcFsSclLcnt
Auto Trait Implementations§
impl Freeze for IcFsSclLcnt
impl RefUnwindSafe for IcFsSclLcnt
impl Send for IcFsSclLcnt
impl Sync for IcFsSclLcnt
impl Unpin for IcFsSclLcnt
impl UnwindSafe for IcFsSclLcnt
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)