Structs§
- Baud rate
- Control register 0
- Master Control register 1
- DMA control
- DMA RX data level
- DMA TX data level
- Interrupt clear
- Interrupt mask
- Interrupt status
- Multi-master interrupt clear
- Microwire Control
- Raw interrupt status
- RX sample delay
- RX FIFO level
- RX FIFO threshold level
- RX FIFO overflow interrupt clear
- RX FIFO underflow interrupt clear
- Slave enable
- SPI control
- Status register
- SSI Enable
- TX drive edge
- TX FIFO level
- TX FIFO threshold level
- TX FIFO overflow interrupt clear