Struct rp_pac::vreg_and_chip_reset::regs::Vreg

#[repr(transparent)]
pub struct Vreg(pub u32);

Voltage regulator control and status

Tuple Fields

0: u32

Implementations

impl Vreg

pub const fn en(&self) -> bool

enable 0=not enabled, 1=enabled

pub fn set_en(&mut self, val: bool)

enable 0=not enabled, 1=enabled

pub const fn hiz(&self) -> bool

high impedance mode select 0=not in high impedance mode, 1=in high impedance mode

pub fn set_hiz(&mut self, val: bool)

high impedance mode select 0=not in high impedance mode, 1=in high impedance mode

pub const fn vsel(&self) -> u8

output voltage select 0000 to 0101 - 0.80V 0110 - 0.85V 0111 - 0.90V 1000 - 0.95V 1001 - 1.00V 1010 - 1.05V 1011 - 1.10V (default) 1100 - 1.15V 1101 - 1.20V 1110 - 1.25V 1111 - 1.30V

pub fn set_vsel(&mut self, val: u8)

output voltage select 0000 to 0101 - 0.80V 0110 - 0.85V 0111 - 0.90V 1000 - 0.95V 1001 - 1.00V 1010 - 1.05V 1011 - 1.10V (default) 1100 - 1.15V 1101 - 1.20V 1110 - 1.25V 1111 - 1.30V

pub const fn rok(&self) -> bool

regulation status 0=not in regulation, 1=in regulation

pub fn set_rok(&mut self, val: bool)

regulation status 0=not in regulation, 1=in regulation

Trait Implementations

impl Clone for Vreg

fn clone(&self) -> Vreg

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Vreg

fn default() -> Vreg

Returns the “default value” for a type.

impl PartialEq for Vreg

fn eq(&self, other: &Vreg) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Vreg

impl Eq for Vreg

impl StructuralPartialEq for Vreg