#[repr(u8)]pub enum Perfsel {
Show 128 variants
SIOB_PROC1_STALL_UPSTREAM = 0,
SIOB_PROC1_STALL_DOWNSTREAM = 1,
SIOB_PROC1_ACCESS_CONTESTED = 2,
SIOB_PROC1_ACCESS = 3,
SIOB_PROC0_STALL_UPSTREAM = 4,
SIOB_PROC0_STALL_DOWNSTREAM = 5,
SIOB_PROC0_ACCESS_CONTESTED = 6,
SIOB_PROC0_ACCESS = 7,
APB_STALL_UPSTREAM = 8,
APB_STALL_DOWNSTREAM = 9,
APB_ACCESS_CONTESTED = 10,
APB_ACCESS = 11,
FASTPERI_STALL_UPSTREAM = 12,
FASTPERI_STALL_DOWNSTREAM = 13,
FASTPERI_ACCESS_CONTESTED = 14,
FASTPERI_ACCESS = 15,
SRAM9_STALL_UPSTREAM = 16,
SRAM9_STALL_DOWNSTREAM = 17,
SRAM9_ACCESS_CONTESTED = 18,
SRAM9_ACCESS = 19,
SRAM8_STALL_UPSTREAM = 20,
SRAM8_STALL_DOWNSTREAM = 21,
SRAM8_ACCESS_CONTESTED = 22,
SRAM8_ACCESS = 23,
SRAM7_STALL_UPSTREAM = 24,
SRAM7_STALL_DOWNSTREAM = 25,
SRAM7_ACCESS_CONTESTED = 26,
SRAM7_ACCESS = 27,
SRAM6_STALL_UPSTREAM = 28,
SRAM6_STALL_DOWNSTREAM = 29,
SRAM6_ACCESS_CONTESTED = 30,
SRAM6_ACCESS = 31,
SRAM5_STALL_UPSTREAM = 32,
SRAM5_STALL_DOWNSTREAM = 33,
SRAM5_ACCESS_CONTESTED = 34,
SRAM5_ACCESS = 35,
SRAM4_STALL_UPSTREAM = 36,
SRAM4_STALL_DOWNSTREAM = 37,
SRAM4_ACCESS_CONTESTED = 38,
SRAM4_ACCESS = 39,
SRAM3_STALL_UPSTREAM = 40,
SRAM3_STALL_DOWNSTREAM = 41,
SRAM3_ACCESS_CONTESTED = 42,
SRAM3_ACCESS = 43,
SRAM2_STALL_UPSTREAM = 44,
SRAM2_STALL_DOWNSTREAM = 45,
SRAM2_ACCESS_CONTESTED = 46,
SRAM2_ACCESS = 47,
SRAM1_STALL_UPSTREAM = 48,
SRAM1_STALL_DOWNSTREAM = 49,
SRAM1_ACCESS_CONTESTED = 50,
SRAM1_ACCESS = 51,
SRAM0_STALL_UPSTREAM = 52,
SRAM0_STALL_DOWNSTREAM = 53,
SRAM0_ACCESS_CONTESTED = 54,
SRAM0_ACCESS = 55,
XIP_MAIN1_STALL_UPSTREAM = 56,
XIP_MAIN1_STALL_DOWNSTREAM = 57,
XIP_MAIN1_ACCESS_CONTESTED = 58,
XIP_MAIN1_ACCESS = 59,
XIP_MAIN0_STALL_UPSTREAM = 60,
XIP_MAIN0_STALL_DOWNSTREAM = 61,
XIP_MAIN0_ACCESS_CONTESTED = 62,
XIP_MAIN0_ACCESS = 63,
ROM_STALL_UPSTREAM = 64,
ROM_STALL_DOWNSTREAM = 65,
ROM_ACCESS_CONTESTED = 66,
ROM_ACCESS = 67,
_RESERVED_44 = 68,
_RESERVED_45 = 69,
_RESERVED_46 = 70,
_RESERVED_47 = 71,
_RESERVED_48 = 72,
_RESERVED_49 = 73,
_RESERVED_4a = 74,
_RESERVED_4b = 75,
_RESERVED_4c = 76,
_RESERVED_4d = 77,
_RESERVED_4e = 78,
_RESERVED_4f = 79,
_RESERVED_50 = 80,
_RESERVED_51 = 81,
_RESERVED_52 = 82,
_RESERVED_53 = 83,
_RESERVED_54 = 84,
_RESERVED_55 = 85,
_RESERVED_56 = 86,
_RESERVED_57 = 87,
_RESERVED_58 = 88,
_RESERVED_59 = 89,
_RESERVED_5a = 90,
_RESERVED_5b = 91,
_RESERVED_5c = 92,
_RESERVED_5d = 93,
_RESERVED_5e = 94,
_RESERVED_5f = 95,
_RESERVED_60 = 96,
_RESERVED_61 = 97,
_RESERVED_62 = 98,
_RESERVED_63 = 99,
_RESERVED_64 = 100,
_RESERVED_65 = 101,
_RESERVED_66 = 102,
_RESERVED_67 = 103,
_RESERVED_68 = 104,
_RESERVED_69 = 105,
_RESERVED_6a = 106,
_RESERVED_6b = 107,
_RESERVED_6c = 108,
_RESERVED_6d = 109,
_RESERVED_6e = 110,
_RESERVED_6f = 111,
_RESERVED_70 = 112,
_RESERVED_71 = 113,
_RESERVED_72 = 114,
_RESERVED_73 = 115,
_RESERVED_74 = 116,
_RESERVED_75 = 117,
_RESERVED_76 = 118,
_RESERVED_77 = 119,
_RESERVED_78 = 120,
_RESERVED_79 = 121,
_RESERVED_7a = 122,
_RESERVED_7b = 123,
_RESERVED_7c = 124,
_RESERVED_7d = 125,
_RESERVED_7e = 126,
_RESERVED_7f = 127,
}
Variants§
SIOB_PROC1_STALL_UPSTREAM = 0
SIOB_PROC1_STALL_DOWNSTREAM = 1
SIOB_PROC1_ACCESS_CONTESTED = 2
SIOB_PROC1_ACCESS = 3
SIOB_PROC0_STALL_UPSTREAM = 4
SIOB_PROC0_STALL_DOWNSTREAM = 5
SIOB_PROC0_ACCESS_CONTESTED = 6
SIOB_PROC0_ACCESS = 7
APB_STALL_UPSTREAM = 8
APB_STALL_DOWNSTREAM = 9
APB_ACCESS_CONTESTED = 10
APB_ACCESS = 11
FASTPERI_STALL_UPSTREAM = 12
FASTPERI_STALL_DOWNSTREAM = 13
FASTPERI_ACCESS_CONTESTED = 14
FASTPERI_ACCESS = 15
SRAM9_STALL_UPSTREAM = 16
SRAM9_STALL_DOWNSTREAM = 17
SRAM9_ACCESS_CONTESTED = 18
SRAM9_ACCESS = 19
SRAM8_STALL_UPSTREAM = 20
SRAM8_STALL_DOWNSTREAM = 21
SRAM8_ACCESS_CONTESTED = 22
SRAM8_ACCESS = 23
SRAM7_STALL_UPSTREAM = 24
SRAM7_STALL_DOWNSTREAM = 25
SRAM7_ACCESS_CONTESTED = 26
SRAM7_ACCESS = 27
SRAM6_STALL_UPSTREAM = 28
SRAM6_STALL_DOWNSTREAM = 29
SRAM6_ACCESS_CONTESTED = 30
SRAM6_ACCESS = 31
SRAM5_STALL_UPSTREAM = 32
SRAM5_STALL_DOWNSTREAM = 33
SRAM5_ACCESS_CONTESTED = 34
SRAM5_ACCESS = 35
SRAM4_STALL_UPSTREAM = 36
SRAM4_STALL_DOWNSTREAM = 37
SRAM4_ACCESS_CONTESTED = 38
SRAM4_ACCESS = 39
SRAM3_STALL_UPSTREAM = 40
SRAM3_STALL_DOWNSTREAM = 41
SRAM3_ACCESS_CONTESTED = 42
SRAM3_ACCESS = 43
SRAM2_STALL_UPSTREAM = 44
SRAM2_STALL_DOWNSTREAM = 45
SRAM2_ACCESS_CONTESTED = 46
SRAM2_ACCESS = 47
SRAM1_STALL_UPSTREAM = 48
SRAM1_STALL_DOWNSTREAM = 49
SRAM1_ACCESS_CONTESTED = 50
SRAM1_ACCESS = 51
SRAM0_STALL_UPSTREAM = 52
SRAM0_STALL_DOWNSTREAM = 53
SRAM0_ACCESS_CONTESTED = 54
SRAM0_ACCESS = 55
XIP_MAIN1_STALL_UPSTREAM = 56
XIP_MAIN1_STALL_DOWNSTREAM = 57
XIP_MAIN1_ACCESS_CONTESTED = 58
XIP_MAIN1_ACCESS = 59
XIP_MAIN0_STALL_UPSTREAM = 60
XIP_MAIN0_STALL_DOWNSTREAM = 61
XIP_MAIN0_ACCESS_CONTESTED = 62
XIP_MAIN0_ACCESS = 63
ROM_STALL_UPSTREAM = 64
ROM_STALL_DOWNSTREAM = 65
ROM_ACCESS_CONTESTED = 66
ROM_ACCESS = 67
_RESERVED_44 = 68
_RESERVED_45 = 69
_RESERVED_46 = 70
_RESERVED_47 = 71
_RESERVED_48 = 72
_RESERVED_49 = 73
_RESERVED_4a = 74
_RESERVED_4b = 75
_RESERVED_4c = 76
_RESERVED_4d = 77
_RESERVED_4e = 78
_RESERVED_4f = 79
_RESERVED_50 = 80
_RESERVED_51 = 81
_RESERVED_52 = 82
_RESERVED_53 = 83
_RESERVED_54 = 84
_RESERVED_55 = 85
_RESERVED_56 = 86
_RESERVED_57 = 87
_RESERVED_58 = 88
_RESERVED_59 = 89
_RESERVED_5a = 90
_RESERVED_5b = 91
_RESERVED_5c = 92
_RESERVED_5d = 93
_RESERVED_5e = 94
_RESERVED_5f = 95
_RESERVED_60 = 96
_RESERVED_61 = 97
_RESERVED_62 = 98
_RESERVED_63 = 99
_RESERVED_64 = 100
_RESERVED_65 = 101
_RESERVED_66 = 102
_RESERVED_67 = 103
_RESERVED_68 = 104
_RESERVED_69 = 105
_RESERVED_6a = 106
_RESERVED_6b = 107
_RESERVED_6c = 108
_RESERVED_6d = 109
_RESERVED_6e = 110
_RESERVED_6f = 111
_RESERVED_70 = 112
_RESERVED_71 = 113
_RESERVED_72 = 114
_RESERVED_73 = 115
_RESERVED_74 = 116
_RESERVED_75 = 117
_RESERVED_76 = 118
_RESERVED_77 = 119
_RESERVED_78 = 120
_RESERVED_79 = 121
_RESERVED_7a = 122
_RESERVED_7b = 123
_RESERVED_7c = 124
_RESERVED_7d = 125
_RESERVED_7e = 126
_RESERVED_7f = 127
Implementations§
Trait Implementations§
source§impl Ord for Perfsel
impl Ord for Perfsel
source§impl PartialOrd for Perfsel
impl PartialOrd for Perfsel
impl Copy for Perfsel
impl Eq for Perfsel
impl StructuralPartialEq for Perfsel
Auto Trait Implementations§
impl Freeze for Perfsel
impl RefUnwindSafe for Perfsel
impl Send for Perfsel
impl Sync for Perfsel
impl Unpin for Perfsel
impl UnwindSafe for Perfsel
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
🔬This is a nightly-only experimental API. (
clone_to_uninit
)