#[repr(transparent)]pub struct ClkGpoutCtrl(pub u32);
Expand description
Clock control, can be changed on-the-fly (except for auxsrc)
Tuple Fields§
§0: u32
Implementations§
Source§impl ClkGpoutCtrl
impl ClkGpoutCtrl
Sourcepub const fn auxsrc(&self) -> ClkGpoutCtrlAuxsrc
pub const fn auxsrc(&self) -> ClkGpoutCtrlAuxsrc
Selects the auxiliary clock source, will glitch when switching
Sourcepub fn set_auxsrc(&mut self, val: ClkGpoutCtrlAuxsrc)
pub fn set_auxsrc(&mut self, val: ClkGpoutCtrlAuxsrc)
Selects the auxiliary clock source, will glitch when switching
Sourcepub const fn kill(&self) -> bool
pub const fn kill(&self) -> bool
Asynchronously kills the clock generator, enable must be set low before deasserting kill
Sourcepub fn set_kill(&mut self, val: bool)
pub fn set_kill(&mut self, val: bool)
Asynchronously kills the clock generator, enable must be set low before deasserting kill
Sourcepub fn set_enable(&mut self, val: bool)
pub fn set_enable(&mut self, val: bool)
Starts and stops the clock generator cleanly
Sourcepub const fn dc50(&self) -> bool
pub const fn dc50(&self) -> bool
Enables duty cycle correction for odd divisors, can be changed on-the-fly
Sourcepub fn set_dc50(&mut self, val: bool)
pub fn set_dc50(&mut self, val: bool)
Enables duty cycle correction for odd divisors, can be changed on-the-fly
Sourcepub const fn phase(&self) -> u8
pub const fn phase(&self) -> u8
This delays the enable signal by up to 3 cycles of the input clock This must be set before the clock is enabled to have any effect
Sourcepub fn set_phase(&mut self, val: u8)
pub fn set_phase(&mut self, val: u8)
This delays the enable signal by up to 3 cycles of the input clock This must be set before the clock is enabled to have any effect
Sourcepub const fn nudge(&self) -> bool
pub const fn nudge(&self) -> bool
An edge on this signal shifts the phase of the output by 1 cycle of the input clock This can be done at any time
Sourcepub fn set_nudge(&mut self, val: bool)
pub fn set_nudge(&mut self, val: bool)
An edge on this signal shifts the phase of the output by 1 cycle of the input clock This can be done at any time
Sourcepub fn set_enabled(&mut self, val: bool)
pub fn set_enabled(&mut self, val: bool)
clock generator is enabled
Trait Implementations§
Source§impl Clone for ClkGpoutCtrl
impl Clone for ClkGpoutCtrl
Source§fn clone(&self) -> ClkGpoutCtrl
fn clone(&self) -> ClkGpoutCtrl
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
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