Struct rp_pac::clocks::regs::ClkSysSelected

#[repr(transparent)]
pub struct ClkSysSelected(pub u32);

Indicates which src is currently selected (one-hot)

Tuple Fields

0: u32

Implementations

impl ClkSysSelected

pub const fn clk_sys_selected(&self) -> u8

The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.

pub fn set_clk_sys_selected(&mut self, val: u8)

The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.

Trait Implementations

impl Clone for ClkSysSelected

fn clone(&self) -> ClkSysSelected

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for ClkSysSelected

fn default() -> ClkSysSelected

Returns the “default value” for a type.

impl PartialEq for ClkSysSelected

fn eq(&self, other: &ClkSysSelected) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for ClkSysSelected

impl Eq for ClkSysSelected

impl StructuralPartialEq for ClkSysSelected