Struct rp_pac::dma::regs::SeccfgCh

#[repr(transparent)]
pub struct SeccfgCh(pub u32);

Security configuration for channel 6. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses. If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P > S+U > NS+P > NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel. This register automatically locks down (becomes read-only) once software starts to configure the channel. This register is world-readable, but is writable only from a Secure, Privileged context.

Tuple Fields

0: u32

Implementations

impl SeccfgCh

pub const fn p(&self) -> bool

Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses. If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.

pub fn set_p(&mut self, val: bool)

Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses. If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.

pub const fn s(&self) -> bool

Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses. If 1, this channel is controllable only from a Secure context.

pub fn set_s(&mut self, val: bool)

Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses. If 1, this channel is controllable only from a Secure context.

pub const fn lock(&self) -> bool

LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel’s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases. Once its LOCK bit is set, this register becomes read-only. A failed write, for example due to the write’s privilege being lower than that specified in the channel’s SECCFG register, will not set the LOCK bit.

pub fn set_lock(&mut self, val: bool)

LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel’s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases. Once its LOCK bit is set, this register becomes read-only. A failed write, for example due to the write’s privilege being lower than that specified in the channel’s SECCFG register, will not set the LOCK bit.

Trait Implementations

impl Clone for SeccfgCh

fn clone(&self) -> SeccfgCh

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for SeccfgCh

fn default() -> SeccfgCh

Returns the “default value” for a type.

impl PartialEq for SeccfgCh

fn eq(&self, other: &SeccfgCh) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SeccfgCh

impl Eq for SeccfgCh

impl StructuralPartialEq for SeccfgCh