Struct rp_pac::glitch_detector::regs::Arm
source · #[repr(transparent)]pub struct Arm(pub u32);
Expand description
Forcibly arm the glitch detectors, if they are not already armed by OTP. When armed, any individual detector trigger will cause a restart of the switched core power domain’s power-on reset state machine. Glitch detector triggers are recorded accumulatively in TRIG_STATUS. If the system is reset by a glitch detector trigger, this is recorded in POWMAN_CHIP_RESET. This register is Secure read/write only.
Tuple Fields§
§0: u32
Implementations§
Trait Implementations§
impl Copy for Arm
impl Eq for Arm
impl StructuralPartialEq for Arm
Auto Trait Implementations§
impl Freeze for Arm
impl RefUnwindSafe for Arm
impl Send for Arm
impl Sync for Arm
impl Unpin for Arm
impl UnwindSafe for Arm
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
🔬This is a nightly-only experimental API. (
clone_to_uninit
)