Struct rp_pac::i2c::regs::IcFsSclHcnt

#[repr(transparent)]
pub struct IcFsSclHcnt(pub u32);

Fast Mode or Fast Mode Plus I2C Clock SCL High Count Register

Tuple Fields

0: u32

Implementations

impl IcFsSclHcnt

pub const fn ic_fs_scl_hcnt(&self) -> u16

This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for fast mode or fast mode plus. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to ‘IC_CLK Frequency Configuration’. This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. The minimum valid value is 6; hardware prevents values less than this being written, and if attempted results in 6 being set. For designs with APB_DATA_WIDTH == 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed.

pub fn set_ic_fs_scl_hcnt(&mut self, val: u16)

This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for fast mode or fast mode plus. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to ‘IC_CLK Frequency Configuration’. This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. The minimum valid value is 6; hardware prevents values less than this being written, and if attempted results in 6 being set. For designs with APB_DATA_WIDTH == 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed.

Trait Implementations

impl Clone for IcFsSclHcnt

fn clone(&self) -> IcFsSclHcnt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for IcFsSclHcnt

fn default() -> IcFsSclHcnt

Returns the “default value” for a type.

impl PartialEq for IcFsSclHcnt

fn eq(&self, other: &IcFsSclHcnt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for IcFsSclHcnt

impl Eq for IcFsSclHcnt

impl StructuralPartialEq for IcFsSclHcnt