Struct rp_pac::pio::regs::SmShiftctrl

#[repr(transparent)]
pub struct SmShiftctrl(pub u32);

Control behaviour of the input/output shift registers for state machine 0

Tuple Fields

0: u32

Implementations

impl SmShiftctrl

pub const fn in_count(&self) -> u8

Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction. For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking. Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.

pub fn set_in_count(&mut self, val: u8)

Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction. For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking. Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.

pub const fn fjoin_rx_get(&self) -> bool

If 1, disable this state machine’s RX FIFO, make its storage available for random read access by the state machine (using the get instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers). If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO’s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor. Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.

pub fn set_fjoin_rx_get(&mut self, val: bool)

If 1, disable this state machine’s RX FIFO, make its storage available for random read access by the state machine (using the get instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers). If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO’s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor. Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.

pub const fn fjoin_rx_put(&self) -> bool

If 1, disable this state machine’s RX FIFO, make its storage available for random write access by the state machine (using the put instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers). If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO’s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor. Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.

pub fn set_fjoin_rx_put(&mut self, val: bool)

If 1, disable this state machine’s RX FIFO, make its storage available for random write access by the state machine (using the put instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers). If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO’s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor. Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.

pub const fn autopush(&self) -> bool

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

pub fn set_autopush(&mut self, val: bool)

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

pub const fn autopull(&self) -> bool

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

pub fn set_autopull(&mut self, val: bool)

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

pub const fn in_shiftdir(&self) -> bool

1 = shift input shift register to right (data enters from left). 0 = to left.

pub fn set_in_shiftdir(&mut self, val: bool)

1 = shift input shift register to right (data enters from left). 0 = to left.

pub const fn out_shiftdir(&self) -> bool

1 = shift out of output shift register to right. 0 = to left.

pub fn set_out_shiftdir(&mut self, val: bool)

1 = shift out of output shift register to right. 0 = to left.

pub const fn push_thresh(&self) -> u8

Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place. Write 0 for value of 32.

pub fn set_push_thresh(&mut self, val: u8)

Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place. Write 0 for value of 32.

pub const fn pull_thresh(&self) -> u8

Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place. Write 0 for value of 32.

pub fn set_pull_thresh(&mut self, val: u8)

Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place. Write 0 for value of 32.

pub const fn fjoin_tx(&self) -> bool

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

pub fn set_fjoin_tx(&mut self, val: bool)

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

pub const fn fjoin_rx(&self) -> bool

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

pub fn set_fjoin_rx(&mut self, val: bool)

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

Trait Implementations

impl Clone for SmShiftctrl

fn clone(&self) -> SmShiftctrl

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for SmShiftctrl

fn default() -> SmShiftctrl

Returns the “default value” for a type.

impl PartialEq for SmShiftctrl

fn eq(&self, other: &SmShiftctrl) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SmShiftctrl

impl Eq for SmShiftctrl

impl StructuralPartialEq for SmShiftctrl