#[repr(transparent)]pub struct ChCsr(pub u32);
Expand description
Control and status register
Tuple Fields§
§0: u32
Implementations§
Source§impl ChCsr
impl ChCsr
Sourcepub const fn ph_correct(&self) -> bool
pub const fn ph_correct(&self) -> bool
1: Enable phase-correct modulation. 0: Trailing-edge
Sourcepub fn set_ph_correct(&mut self, val: bool)
pub fn set_ph_correct(&mut self, val: bool)
1: Enable phase-correct modulation. 0: Trailing-edge
pub const fn divmode(&self) -> Divmode
pub fn set_divmode(&mut self, val: Divmode)
Sourcepub const fn ph_ret(&self) -> bool
pub const fn ph_ret(&self) -> bool
Retard the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running.
Sourcepub fn set_ph_ret(&mut self, val: bool)
pub fn set_ph_ret(&mut self, val: bool)
Retard the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running.
Sourcepub const fn ph_adv(&self) -> bool
pub const fn ph_adv(&self) -> bool
Advance the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running at less than full speed (div_int + div_frac / 16 > 1)
Sourcepub fn set_ph_adv(&mut self, val: bool)
pub fn set_ph_adv(&mut self, val: bool)
Advance the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running at less than full speed (div_int + div_frac / 16 > 1)