#[repr(transparent)]pub struct Freqa(pub u32);
Expand description
The FREQA & FREQB registers control the frequency by controlling the drive strength of each stage The drive strength has 4 levels determined by the number of bits set Increasing the number of bits set increases the drive strength and increases the oscillation frequency 0 bits set is the default drive strength 1 bit set doubles the drive strength 2 bits set triples drive strength 3 bits set quadruples drive strength For frequency randomisation set both DS0_RANDOM=1 & DS1_RANDOM=1
Tuple Fields§
§0: u32
Implementations§
Source§impl Freqa
impl Freqa
Sourcepub const fn ds0_random(&self) -> bool
pub const fn ds0_random(&self) -> bool
Randomises the stage 0 drive strength
Sourcepub fn set_ds0_random(&mut self, val: bool)
pub fn set_ds0_random(&mut self, val: bool)
Randomises the stage 0 drive strength
Sourcepub const fn ds1_random(&self) -> bool
pub const fn ds1_random(&self) -> bool
Randomises the stage 1 drive strength
Sourcepub fn set_ds1_random(&mut self, val: bool)
pub fn set_ds1_random(&mut self, val: bool)
Randomises the stage 1 drive strength
Sourcepub const fn passwd(&self) -> Passwd
pub const fn passwd(&self) -> Passwd
Set to 0x9696 to apply the settings Any other value in this field will set all drive strengths to 0
Sourcepub fn set_passwd(&mut self, val: Passwd)
pub fn set_passwd(&mut self, val: Passwd)
Set to 0x9696 to apply the settings Any other value in this field will set all drive strengths to 0