#[repr(transparent)]pub struct TmdsCtrl(pub u32);
Expand description
Control register for TMDS encoder.
Tuple Fields§
§0: u32
Implementations§
source§impl TmdsCtrl
impl TmdsCtrl
sourcepub const fn l0_rot(&self) -> u8
pub const fn l0_rot(&self) -> u8
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 0 (blue) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565 (red most significant), blue is bits 4:0, so should be right-rotated by 13 to align with bits 7:3 of the encoder input.
sourcepub fn set_l0_rot(&mut self, val: u8)
pub fn set_l0_rot(&mut self, val: u8)
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 0 (blue) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565 (red most significant), blue is bits 4:0, so should be right-rotated by 13 to align with bits 7:3 of the encoder input.
sourcepub const fn l1_rot(&self) -> u8
pub const fn l1_rot(&self) -> u8
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 1 (green) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565, green is bits 10:5, so should be right-rotated by 3 bits to align with bits 7:2 of the encoder input.
sourcepub fn set_l1_rot(&mut self, val: u8)
pub fn set_l1_rot(&mut self, val: u8)
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 1 (green) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565, green is bits 10:5, so should be right-rotated by 3 bits to align with bits 7:2 of the encoder input.
sourcepub const fn l2_rot(&self) -> u8
pub const fn l2_rot(&self) -> u8
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 2 (red) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565 (red most significant), red is bits 15:11, so should be right-rotated by 8 bits to align with bits 7:3 of the encoder input.
sourcepub fn set_l2_rot(&mut self, val: u8)
pub fn set_l2_rot(&mut self, val: u8)
Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 2 (red) colour data aligned with the MSB of the 8-bit encoder input. For example, for RGB565 (red most significant), red is bits 15:11, so should be right-rotated by 8 bits to align with bits 7:3 of the encoder input.
sourcepub const fn l0_nbits(&self) -> u8
pub const fn l0_nbits(&self) -> u8
Number of valid colour MSBs for lane 0 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub fn set_l0_nbits(&mut self, val: u8)
pub fn set_l0_nbits(&mut self, val: u8)
Number of valid colour MSBs for lane 0 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub const fn l1_nbits(&self) -> u8
pub const fn l1_nbits(&self) -> u8
Number of valid colour MSBs for lane 1 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub fn set_l1_nbits(&mut self, val: u8)
pub fn set_l1_nbits(&mut self, val: u8)
Number of valid colour MSBs for lane 1 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub const fn l2_nbits(&self) -> u8
pub const fn l2_nbits(&self) -> u8
Number of valid colour MSBs for lane 2 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub fn set_l2_nbits(&mut self, val: u8)
pub fn set_l2_nbits(&mut self, val: u8)
Number of valid colour MSBs for lane 2 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.
sourcepub const fn interleave(&self) -> bool
pub const fn interleave(&self) -> bool
Enable lane interleaving for reads of PEEK_SINGLE/POP_SINGLE. When interleaving is disabled, each of the 3 symbols appears as a contiguous 10-bit field, with lane 0 being the least-significant and starting at bit 0 of the register. When interleaving is enabled, the symbols are packed into 5 chunks of 3 lanes times 2 bits (30 bits total). Each chunk contains two bits of a TMDS symbol per lane, with lane 0 being the least significant.
sourcepub fn set_interleave(&mut self, val: bool)
pub fn set_interleave(&mut self, val: bool)
Enable lane interleaving for reads of PEEK_SINGLE/POP_SINGLE. When interleaving is disabled, each of the 3 symbols appears as a contiguous 10-bit field, with lane 0 being the least-significant and starting at bit 0 of the register. When interleaving is enabled, the symbols are packed into 5 chunks of 3 lanes times 2 bits (30 bits total). Each chunk contains two bits of a TMDS symbol per lane, with lane 0 being the least significant.
sourcepub const fn pix_shift(&self) -> PixShift
pub const fn pix_shift(&self) -> PixShift
Shift applied to the colour data register with each read of a POP alias register. Reading from the POP_SINGLE register, or reading from the POP_DOUBLE register with PIX2_NOSHIFT set (for pixel doubling), shifts by the indicated amount. Reading from a POP_DOUBLE register when PIX2_NOSHIFT is clear will shift by double the indicated amount. (Shift by 32 means no shift.)
sourcepub fn set_pix_shift(&mut self, val: PixShift)
pub fn set_pix_shift(&mut self, val: PixShift)
Shift applied to the colour data register with each read of a POP alias register. Reading from the POP_SINGLE register, or reading from the POP_DOUBLE register with PIX2_NOSHIFT set (for pixel doubling), shifts by the indicated amount. Reading from a POP_DOUBLE register when PIX2_NOSHIFT is clear will shift by double the indicated amount. (Shift by 32 means no shift.)
sourcepub const fn pix2_noshift(&self) -> bool
pub const fn pix2_noshift(&self) -> bool
When encoding two pixels’s worth of symbols in one cycle (a read of a PEEK/POP_DOUBLE register), the second encoder sees a shifted version of the colour data register. This control disables that shift, so that both encoder layers see the same pixel data. This is used for pixel doubling.
sourcepub fn set_pix2_noshift(&mut self, val: bool)
pub fn set_pix2_noshift(&mut self, val: bool)
When encoding two pixels’s worth of symbols in one cycle (a read of a PEEK/POP_DOUBLE register), the second encoder sees a shifted version of the colour data register. This control disables that shift, so that both encoder layers see the same pixel data. This is used for pixel doubling.
sourcepub const fn clear_balance(&self) -> bool
pub const fn clear_balance(&self) -> bool
Clear the running DC balance state of the TMDS encoders. This bit should be written once at the beginning of each scanline.
sourcepub fn set_clear_balance(&mut self, val: bool)
pub fn set_clear_balance(&mut self, val: bool)
Clear the running DC balance state of the TMDS encoders. This bit should be written once at the beginning of each scanline.
Trait Implementations§
impl Copy for TmdsCtrl
impl Eq for TmdsCtrl
impl StructuralPartialEq for TmdsCtrl
Auto Trait Implementations§
impl Freeze for TmdsCtrl
impl RefUnwindSafe for TmdsCtrl
impl Send for TmdsCtrl
impl Sync for TmdsCtrl
impl Unpin for TmdsCtrl
impl UnwindSafe for TmdsCtrl
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)