pub struct Syscfg { /* private fields */ }
Expand description
Register block for various chip control signals
Implementations§
Source§impl Syscfg
impl Syscfg
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn proc_config(self) -> Reg<ProcConfig, RW>
pub const fn proc_config(self) -> Reg<ProcConfig, RW>
Configuration for processors
Sourcepub const fn proc_in_sync_bypass(self) -> Reg<u32, RW>
pub const fn proc_in_sync_bypass(self) -> Reg<u32, RW>
For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 0…31.
Sourcepub const fn proc_in_sync_bypass_hi(self) -> Reg<ProcInSyncBypassHi, RW>
pub const fn proc_in_sync_bypass_hi(self) -> Reg<ProcInSyncBypassHi, RW>
For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 32…47. USB GPIO 56..57 QSPI GPIO 58..63
Sourcepub const fn mempowerdown(self) -> Reg<Mempowerdown, RW>
pub const fn mempowerdown(self) -> Reg<Mempowerdown, RW>
Control PD pins to memories. Set high to put memories to a low power state. In this state the memories will retain contents but not be accessible Use with caution