pub struct ConfiguredSequence<'adc, R: AdcRegs> { /* private fields */ }Expand description
An ADC with a pre-configured channel sequence for repeated DMA reads.
Unlike [Adc::read], this type programs the ADC channel sequence registers
only once at construction. Each call to read
reuses the existing hardware sequence configuration, avoiding the per-call
overhead of reprogramming the sequence registers.
Obtain via [Adc::configured_sequence].
Implementations§
Source§impl<'adc, R: AdcRegs> ConfiguredSequence<'adc, R>
impl<'adc, R: AdcRegs> ConfiguredSequence<'adc, R>
Sourcepub async fn read(&mut self, buf: &mut [u16])
pub async fn read(&mut self, buf: &mut [u16])
Trigger one DMA conversion of the pre-configured channel sequence and wait for it to complete.
Returns a slice over the results in the same channel order as the
sequence passed to [Adc::configured_sequence].
The ADC and DMA are configured once at construction by
[Adc::configured_sequence]. The hardware is configured so that
DMA stays armed between calls while the ADC runs only one sequence per
start call.