pub struct ComplementaryPwm<'d, T: AdvancedInstance4Channel> { /* private fields */ }Expand description
PWM driver with support for standard and complementary outputs.
Implementations§
Source§impl<'d, T: AdvancedInstance4Channel> ComplementaryPwm<'d, T>
impl<'d, T: AdvancedInstance4Channel> ComplementaryPwm<'d, T>
Sourcepub fn new(
tim: Peri<'d, T>,
ch1: Option<PwmPin<'d, T, Ch1>>,
ch1n: Option<ComplementaryPwmPin<'d, T, Ch1>>,
ch2: Option<PwmPin<'d, T, Ch2>>,
ch2n: Option<ComplementaryPwmPin<'d, T, Ch2>>,
ch3: Option<PwmPin<'d, T, Ch3>>,
ch3n: Option<ComplementaryPwmPin<'d, T, Ch3>>,
ch4: Option<PwmPin<'d, T, Ch4>>,
ch4n: Option<ComplementaryPwmPin<'d, T, Ch4>>,
freq: Hertz,
counting_mode: CountingMode,
) -> Self
pub fn new( tim: Peri<'d, T>, ch1: Option<PwmPin<'d, T, Ch1>>, ch1n: Option<ComplementaryPwmPin<'d, T, Ch1>>, ch2: Option<PwmPin<'d, T, Ch2>>, ch2n: Option<ComplementaryPwmPin<'d, T, Ch2>>, ch3: Option<PwmPin<'d, T, Ch3>>, ch3n: Option<ComplementaryPwmPin<'d, T, Ch3>>, ch4: Option<PwmPin<'d, T, Ch4>>, ch4n: Option<ComplementaryPwmPin<'d, T, Ch4>>, freq: Hertz, counting_mode: CountingMode, ) -> Self
Create a new complementary PWM driver.
Sourcepub fn set_output_idle_state(
&mut self,
channels: &[Channel],
polarity: IdlePolarity,
)
pub fn set_output_idle_state( &mut self, channels: &[Channel], polarity: IdlePolarity, )
Sets the idle output state for the given channels.
Sourcepub fn set_off_state_selection_idle(&mut self, val: Ossi)
pub fn set_off_state_selection_idle(&mut self, val: Ossi)
Set state of OSSI-bit in BDTR register
Sourcepub fn get_off_state_selection_idle(&self) -> Ossi
pub fn get_off_state_selection_idle(&self) -> Ossi
Get state of OSSI-bit in BDTR register
Sourcepub fn set_off_state_selection_run(&mut self, val: Ossr)
pub fn set_off_state_selection_run(&mut self, val: Ossr)
Set state of OSSR-bit in BDTR register
Sourcepub fn get_off_state_selection_run(&self) -> Ossr
pub fn get_off_state_selection_run(&self) -> Ossr
Get state of OSSR-bit in BDTR register
Sourcepub fn trigger_software_break(&mut self, n: usize)
pub fn trigger_software_break(&mut self, n: usize)
Trigger break input from software
Sourcepub fn set_master_output_enable(&mut self, enable: bool)
pub fn set_master_output_enable(&mut self, enable: bool)
Set Master Output Enable
Sourcepub fn get_master_output_enable(&self) -> bool
pub fn get_master_output_enable(&self) -> bool
Get Master Output Enable
Sourcepub fn set_break_enable(&mut self, enable: bool)
pub fn set_break_enable(&mut self, enable: bool)
Enable/disable break input 1.
When enabled, an active level on the break input forces all timer outputs to their safe state (configured by OSSI/OSSR and OIS/OISN). This provides hardware-level overcurrent protection for motor drives.
Sourcepub fn get_break_enable(&self) -> bool
pub fn get_break_enable(&self) -> bool
Get break input 1 enable state.
Sourcepub fn set_break_polarity(&mut self, polarity: BreakInputPolarity)
pub fn set_break_polarity(&mut self, polarity: BreakInputPolarity)
Set break input 1 polarity.
Sourcepub fn get_break_polarity(&self) -> BreakInputPolarity
pub fn get_break_polarity(&self) -> BreakInputPolarity
Get break input 1 polarity.
Sourcepub fn set_break_filter(&mut self, filter: FilterValue)
pub fn set_break_filter(&mut self, filter: FilterValue)
Set break input 1 digital filter.
The filter rejects glitches shorter than the configured number of clock cycles, preventing false break events from noise on the pin.
Sourcepub fn get_break_filter(&self) -> FilterValue
pub fn get_break_filter(&self) -> FilterValue
Get break input 1 digital filter.
Sourcepub fn set_break2_enable(&mut self, enable: bool)
pub fn set_break2_enable(&mut self, enable: bool)
Enable/disable break input 2.
Sourcepub fn get_break2_enable(&self) -> bool
pub fn get_break2_enable(&self) -> bool
Get break input 2 enable state.
Sourcepub fn set_break2_polarity(&mut self, polarity: BreakInputPolarity)
pub fn set_break2_polarity(&mut self, polarity: BreakInputPolarity)
Set break input 2 polarity.
Sourcepub fn get_break2_polarity(&self) -> BreakInputPolarity
pub fn get_break2_polarity(&self) -> BreakInputPolarity
Get break input 2 polarity.
Sourcepub fn set_break2_filter(&mut self, filter: FilterValue)
pub fn set_break2_filter(&mut self, filter: FilterValue)
Set break input 2 digital filter.
Sourcepub fn get_break2_filter(&self) -> FilterValue
pub fn get_break2_filter(&self) -> FilterValue
Get break input 2 digital filter.
Sourcepub fn set_automatic_output_enable(&mut self, enable: bool)
pub fn set_automatic_output_enable(&mut self, enable: bool)
Enable/disable automatic output enable (AOE).
When enabled, the MOE bit is automatically set at the next update event after a break event, allowing the outputs to resume. When disabled, MOE can only be re-enabled by software after a break.
Sourcepub fn get_automatic_output_enable(&self) -> bool
pub fn get_automatic_output_enable(&self) -> bool
Get automatic output enable (AOE) state.
Sourcepub fn set_break_comparator_enable(&mut self, comp_index: usize, enable: bool)
pub fn set_break_comparator_enable(&mut self, comp_index: usize, enable: bool)
Enable/disable comparator output as break input 1 source.
Routes the internal comparator output directly to the break input,
no GPIO pin needed. comp_index is 0-based (0=COMP1, 1=COMP2, etc.).
Multiple comparators can be enabled simultaneously (OR’d together).
Sourcepub fn get_break_comparator_enable(&self, comp_index: usize) -> bool
pub fn get_break_comparator_enable(&self, comp_index: usize) -> bool
Get comparator break input 1 enable state.
Sourcepub fn set_break_comparator_polarity(
&mut self,
comp_index: usize,
polarity: BreakComparatorPolarity,
)
pub fn set_break_comparator_polarity( &mut self, comp_index: usize, polarity: BreakComparatorPolarity, )
Set comparator break input 1 polarity.
Sourcepub fn get_break_comparator_polarity(
&self,
comp_index: usize,
) -> BreakComparatorPolarity
pub fn get_break_comparator_polarity( &self, comp_index: usize, ) -> BreakComparatorPolarity
Get comparator break input 1 polarity.
Sourcepub fn set_break_input_pin_enable(&mut self, enable: bool)
pub fn set_break_input_pin_enable(&mut self, enable: bool)
Enable/disable the external BKIN pin as break input 1 source.
Sourcepub fn get_break_input_pin_enable(&self) -> bool
pub fn get_break_input_pin_enable(&self) -> bool
Get external BKIN pin enable state.
Sourcepub fn set_break2_comparator_enable(&mut self, comp_index: usize, enable: bool)
pub fn set_break2_comparator_enable(&mut self, comp_index: usize, enable: bool)
Enable/disable comparator output as break input 2 source.
Sourcepub fn get_break2_comparator_enable(&self, comp_index: usize) -> bool
pub fn get_break2_comparator_enable(&self, comp_index: usize) -> bool
Get comparator break input 2 enable state.
Sourcepub fn set_break2_comparator_polarity(
&mut self,
comp_index: usize,
polarity: BreakComparatorPolarity,
)
pub fn set_break2_comparator_polarity( &mut self, comp_index: usize, polarity: BreakComparatorPolarity, )
Set comparator break input 2 polarity.
Sourcepub fn get_break2_comparator_polarity(
&self,
comp_index: usize,
) -> BreakComparatorPolarity
pub fn get_break2_comparator_polarity( &self, comp_index: usize, ) -> BreakComparatorPolarity
Get comparator break input 2 polarity.
Sourcepub fn set_break2_input_pin_enable(&mut self, enable: bool)
pub fn set_break2_input_pin_enable(&mut self, enable: bool)
Enable/disable the external BK2IN pin as break input 2 source.
Sourcepub fn get_break2_input_pin_enable(&self) -> bool
pub fn get_break2_input_pin_enable(&self) -> bool
Get external BK2IN pin enable state.
Sourcepub fn set_repetition_counter(&mut self, val: u16)
pub fn set_repetition_counter(&mut self, val: u16)
Set Repetition Counter
Sourcepub fn set_frequency(&mut self, freq: Hertz)
pub fn set_frequency(&mut self, freq: Hertz)
Set PWM frequency.
The actual frequency may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.
Note: that the frequency will not be applied in the timer until an update event occurs.
Sourcepub fn set_period_ms(&mut self, ms: u32)
pub fn set_period_ms(&mut self, ms: u32)
Set the PWM period in milliseconds.
The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.
Note: that the period will not be applied in the timer until an update event occurs.
Sourcepub fn set_period_us(&mut self, us: u32)
pub fn set_period_us(&mut self, us: u32)
Set the PWM period in microseconds.
The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.
Note: that the period will not be applied in the timer until an update event occurs.
Sourcepub fn set_period_secs(&mut self, secs: u32)
pub fn set_period_secs(&mut self, secs: u32)
Set the PWM period in seconds.
The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.
Note: that the period will not be applied in the timer until an update event occurs.
Sourcepub fn set_period(&mut self, period: Duration)
pub fn set_period(&mut self, period: Duration)
Set the PWM period using an embassy_time::Duration.
The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.
Note: that the period will not be applied in the timer until an update event occurs.
Sourcepub fn get_max_duty(&self) -> u32
pub fn get_max_duty(&self) -> u32
Get max duty value.
This value depends on the configured frequency and the timer’s clock rate from RCC.
Sourcepub fn set_duty(&mut self, channel: Channel, duty: u32)
pub fn set_duty(&mut self, channel: Channel, duty: u32)
Set the duty for a given channel.
The value ranges from 0 for 0% duty, to get_max_duty for 100% duty, both included.
Sourcepub fn set_polarity(&mut self, channel: Channel, polarity: OutputPolarity)
pub fn set_polarity(&mut self, channel: Channel, polarity: OutputPolarity)
Set the output polarity for a given channel.
Sourcepub fn set_main_polarity(&mut self, channel: Channel, polarity: OutputPolarity)
pub fn set_main_polarity(&mut self, channel: Channel, polarity: OutputPolarity)
Set the main output polarity for a given channel.
Sourcepub fn set_complementary_polarity(
&mut self,
channel: Channel,
polarity: OutputPolarity,
)
pub fn set_complementary_polarity( &mut self, channel: Channel, polarity: OutputPolarity, )
Set the complementary output polarity for a given channel.
Sourcepub fn set_dead_time(&mut self, value: u16)
pub fn set_dead_time(&mut self, value: u16)
Set the dead time as a proportion of max_duty
Sourcepub async fn waveform<C: TimerChannel, W: Word + Into<T::Word>, D: Dma<T, C>>(
&mut self,
dma: Peri<'_, D>,
irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_,
channel: Channel,
duty: &[W],
)
pub async fn waveform<C: TimerChannel, W: Word + Into<T::Word>, D: Dma<T, C>>( &mut self, dma: Peri<'_, D>, irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_, channel: Channel, duty: &[W], )
Generate a sequence of PWM waveform
Note: The DMA channel provided does not need to correspond to the requested channel.
Sourcepub async fn waveform_up<W: Word + Into<T::Word>, D: UpDma<T>>(
&mut self,
dma: Peri<'_, D>,
irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_,
channel: Channel,
duty: &[W],
)
pub async fn waveform_up<W: Word + Into<T::Word>, D: UpDma<T>>( &mut self, dma: Peri<'_, D>, irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_, channel: Channel, duty: &[W], )
Generate a sequence of PWM waveform
Note: you will need to provide corresponding TIMx_UP DMA channel to use this method.
Sourcepub async fn waveform_up_multi_channel<W: Word + Into<T::Word>, D: UpDma<T>>(
&mut self,
dma: Peri<'_, D>,
irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_,
starting_channel: Channel,
ending_channel: Channel,
duty: &[W],
)
pub async fn waveform_up_multi_channel<W: Word + Into<T::Word>, D: UpDma<T>>( &mut self, dma: Peri<'_, D>, irq: impl Binding<D::Interrupt, InterruptHandler<D>> + '_, starting_channel: Channel, ending_channel: Channel, duty: &[W], )
Generate a multichannel sequence of PWM waveforms using DMA triggered by timer update events.
This method utilizes the timer’s DMA burst transfer capability to update multiple CCRx registers in sequence on each update event (UEV). The data is written via the DMAR register using the DMA base address (DBA) and burst length (DBL) configured in the DCR register.
The duty buffer must be structured as a flattened 2D array in row-major order, where each row
represents a single update event and each column corresponds to a specific timer channel (starting
from starting_channel up to and including ending_channel).
For example, if using channels 1 through 4, a buffer of 4 update steps might look like:
let dma_buf: [u16; 16] = [
ch1_duty_1, ch2_duty_1, ch3_duty_1, ch4_duty_1, // update 1
ch1_duty_2, ch2_duty_2, ch3_duty_2, ch4_duty_2, // update 2
ch1_duty_3, ch2_duty_3, ch3_duty_3, ch4_duty_3, // update 3
ch1_duty_4, ch2_duty_4, ch3_duty_4, ch4_duty_4, // update 4
];Each group of N values (where N is number of channels) is transferred on one update event,
updating the duty cycles of all selected channels simultaneously.
Note:
You will need to provide corresponding TIMx_UP DMA channel to use this method.
Also be aware that embassy timers use one of timers internally. It is possible to
switch this timer by using time-driver-timX feature.
Trait Implementations§
Source§impl<'d, T: AdvancedInstance4Channel> Pwm for ComplementaryPwm<'d, T>
impl<'d, T: AdvancedInstance4Channel> Pwm for ComplementaryPwm<'d, T>
Source§type Channel = Channel
type Channel = Channel
Pwm interface Read more