pub struct I2c<'d, M: Mode, IM: MasterMode> { /* private fields */ }Expand description
I2C driver.
Implementations§
Source§impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM>
impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM>
Sourcepub fn blocking_read(
&mut self,
address: u8,
read: &mut [u8],
) -> Result<(), Error>
pub fn blocking_read( &mut self, address: u8, read: &mut [u8], ) -> Result<(), Error>
Blocking read.
Sourcepub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
Blocking write.
Sourcepub fn blocking_write_read(
&mut self,
address: u8,
write: &[u8],
read: &mut [u8],
) -> Result<(), Error>
pub fn blocking_write_read( &mut self, address: u8, write: &[u8], read: &mut [u8], ) -> Result<(), Error>
Blocking write, restart, read.
Sourcepub fn blocking_transaction(
&mut self,
addr: u8,
operations: &mut [Operation<'_>],
) -> Result<(), Error>
pub fn blocking_transaction( &mut self, addr: u8, operations: &mut [Operation<'_>], ) -> Result<(), Error>
Blocking transaction with operations.
Consecutive operations of same type are merged. See transaction contract for details.
Source§impl<'d, IM: MasterMode> I2c<'d, Async, IM>
impl<'d, IM: MasterMode> I2c<'d, Async, IM>
Sourcepub async fn write_vectored(
&mut self,
address: Address,
write: &[&[u8]],
) -> Result<(), Error>
pub async fn write_vectored( &mut self, address: Address, write: &[&[u8]], ) -> Result<(), Error>
Write multiple buffers.
The buffers are concatenated in a single write transaction.
Sourcepub async fn write_read(
&mut self,
address: u8,
write: &[u8],
read: &mut [u8],
) -> Result<(), Error>
pub async fn write_read( &mut self, address: u8, write: &[u8], read: &mut [u8], ) -> Result<(), Error>
Write, restart, read.
Sourcepub async fn transaction(
&mut self,
addr: u8,
operations: &mut [Operation<'_>],
) -> Result<(), Error>
pub async fn transaction( &mut self, addr: u8, operations: &mut [Operation<'_>], ) -> Result<(), Error>
Transaction with operations.
Consecutive operations of same type are merged. See transaction contract for details.
Source§impl<'d, M: Mode> I2c<'d, M, Master>
impl<'d, M: Mode> I2c<'d, M, Master>
Sourcepub fn into_slave_multimaster(
self,
slave_addr_config: SlaveAddrConfig,
) -> I2c<'d, M, MultiMaster>
pub fn into_slave_multimaster( self, slave_addr_config: SlaveAddrConfig, ) -> I2c<'d, M, MultiMaster>
Configure the I2C driver for slave operations, allowing for the driver to be used as a slave and a master (multimaster)
Source§impl<'d, M: Mode> I2c<'d, M, MultiMaster>
impl<'d, M: Mode> I2c<'d, M, MultiMaster>
Sourcepub fn reconfigure_addresses(&mut self, addresses: OwnAddresses)
pub fn reconfigure_addresses(&mut self, addresses: OwnAddresses)
Configure the slave address.
Source§impl<'d, M: Mode> I2c<'d, M, MultiMaster>
impl<'d, M: Mode> I2c<'d, M, MultiMaster>
Sourcepub fn blocking_listen(&mut self) -> Result<SlaveCommand, Error>
pub fn blocking_listen(&mut self) -> Result<SlaveCommand, Error>
Listen for incoming I2C messages.
This method blocks until the slave address is matched by a master.
Sourcepub fn blocking_respond_to_write(
&self,
buffer: &mut [u8],
) -> Result<usize, Error>
pub fn blocking_respond_to_write( &self, buffer: &mut [u8], ) -> Result<usize, Error>
Respond to a write command by receiving data from the master.
Receives up to buffer.len() bytes from the master into the provided buffer.
If the master sends more data than the buffer can hold, excess bytes are
acknowledged but discarded.
Returns the number of bytes actually stored in buffer.
Sourcepub fn blocking_respond_to_read(
&mut self,
write: &[u8],
) -> Result<SendStatus, Error>
pub fn blocking_respond_to_read( &mut self, write: &[u8], ) -> Result<SendStatus, Error>
Respond to a read command by transmitting data to the master.
Transmits the provided data to the master. The master controls how many bytes it reads by sending a NACK after the last byte it wants.
Returns SendStatus::Done if all bytes were sent, or SendStatus::LeftoverBytes
if the master ended the transfer early (sent NACK before all data was transmitted).
Source§impl<'d> I2c<'d, Async, MultiMaster>
impl<'d> I2c<'d, Async, MultiMaster>
Sourcepub async fn listen(&mut self) -> Result<SlaveCommand, Error>
pub async fn listen(&mut self) -> Result<SlaveCommand, Error>
Listen for incoming I2C messages.
The listen method is an asynchronous method but it does not require DMA to be asynchronous.
Sourcepub async fn respond_to_write(
&mut self,
buffer: &mut [u8],
) -> Result<usize, Error>
pub async fn respond_to_write( &mut self, buffer: &mut [u8], ) -> Result<usize, Error>
Respond to a write command by receiving data from the master.
Receives up to buffer.len() bytes from the master into the provided buffer.
If the master sends more data than the buffer can hold, excess bytes are
acknowledged but discarded.
Returns the number of bytes actually stored in buffer.
Sourcepub async fn respond_to_read(
&mut self,
write: &[u8],
) -> Result<SendStatus, Error>
pub async fn respond_to_read( &mut self, write: &[u8], ) -> Result<SendStatus, Error>
Respond to a read request from an I2C master.
Source§impl<'d> I2c<'d, Async, Master>
impl<'d> I2c<'d, Async, Master>
Sourcepub fn new<T: Instance, D1: TxDma<T>, D2: RxDma<T>>(
peri: Peri<'d, T>,
scl: Peri<'d, impl SclPin<T>>,
sda: Peri<'d, impl SdaPin<T>>,
tx_dma: Peri<'d, D1>,
rx_dma: Peri<'d, D2>,
_irq: impl Binding<T::EventInterrupt, EventInterruptHandler<T>> + Binding<T::ErrorInterrupt, ErrorInterruptHandler<T>> + Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + 'd,
config: Config,
) -> Self
pub fn new<T: Instance, D1: TxDma<T>, D2: RxDma<T>>( peri: Peri<'d, T>, scl: Peri<'d, impl SclPin<T>>, sda: Peri<'d, impl SdaPin<T>>, tx_dma: Peri<'d, D1>, rx_dma: Peri<'d, D2>, _irq: impl Binding<T::EventInterrupt, EventInterruptHandler<T>> + Binding<T::ErrorInterrupt, ErrorInterruptHandler<T>> + Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + 'd, config: Config, ) -> Self
Create a new I2C driver.
Trait Implementations§
Source§impl<'d, IM: MasterMode> I2c for I2c<'d, Async, IM>
impl<'d, IM: MasterMode> I2c for I2c<'d, Async, IM>
Source§async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error>
async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error>
address. Read moreSource§impl<'d, M: Mode, IM: MasterMode> I2c for I2c<'d, M, IM>
impl<'d, M: Mode, IM: MasterMode> I2c for I2c<'d, M, IM>
Source§fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error>
fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error>
address. Read more