Struct I2S 

pub struct I2S<'d, W: Word> { /* private fields */ }

I2S driver.

Implementations

impl<'d, W: Word> I2S<'d, W>

pub fn new_txonly<T: Instance, D1: TxDma<T>>( peri: Peri<'d, T>, sd: Peri<'d, impl I2sSdPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, mck: Peri<'d, impl MckPin<T>>, txdma: Peri<'d, D1>, txdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a transmitter driver.

pub fn new_txonly_nomck<T: Instance, D1: TxDma<T>>( peri: Peri<'d, T>, sd: Peri<'d, impl I2sSdPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, txdma: Peri<'d, D1>, txdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a transmitter driver without a master clock pin.

pub fn new_rxonly<T: Instance, D1: RxDma<T>>( peri: Peri<'d, T>, sd: Peri<'d, impl I2sSdPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, mck: Peri<'d, impl MckPin<T>>, rxdma: Peri<'d, D1>, rxdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a receiver driver.

pub fn new_rxonly_nomck<T: Instance, D1: RxDma<T>>( peri: Peri<'d, T>, sd: Peri<'d, impl I2sSdPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, rxdma: Peri<'d, D1>, rxdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a receiver driver without a master clock pin.

pub fn new_full_duplex<T: Instance, D1: TxDma<T>, D2: RxDma<T>>( peri: Peri<'d, T>, txsd: Peri<'d, impl MosiPin<T>>, rxsd: Peri<'d, impl MisoPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, mck: Peri<'d, impl MckPin<T>>, txdma: Peri<'d, D1>, txdma_buf: &'d mut [W], rxdma: Peri<'d, D2>, rxdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + 'd, config: Config, ) -> Self

Create a full duplex driver.

pub fn new_full_duplex_nomck<T: Instance, D1: TxDma<T>, D2: RxDma<T>>( peri: Peri<'d, T>, txsd: Peri<'d, impl MosiPin<T>>, rxsd: Peri<'d, impl MisoPin<T>>, ws: Peri<'d, impl WsPin<T>>, ck: Peri<'d, impl CkPin<T>>, txdma: Peri<'d, D1>, txdma_buf: &'d mut [W], rxdma: Peri<'d, D2>, rxdma_buf: &'d mut [W], _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + 'd, config: Config, ) -> Self

Create a full duplex driver without a master clock pin.

pub fn start(&mut self)

Start I2S driver.

pub fn clear(&mut self)

Reset the ring buffer to its initial state. Can be used to recover from overrun.

After reset, the next RX read will automatically realign to a frame boundary, discarding any partial frame at the current DMA position.

pub async fn stop(&mut self)

Stop I2S driver.

pub fn split<'s>( &'s mut self, ) -> Result<(Reader<'s, 'd, W>, Writer<'s, 'd, W>), Error>

Split the driver into a Reader/Writer pair. Useful for splitting the reader/writer functionality across tasks or for calling the read/write methods in parallel.

pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error>

Read data from the I2S ringbuffer. SAI is always receiving data in the background. This function pops already-received data from the buffer. If there’s less than data.len() data in the buffer, this waits until there is.

pub async fn write(&mut self, data: &[W]) -> Result<(), Error>

Write data to the I2S ringbuffer. This appends the data to the buffer and returns immediately. The data will be transmitted in the background. If thfre’s no space in the buffer, this waits until there is.

pub fn tx_write_pos(&self) -> Option<usize>

Return the current write position in the TX DMA ring buffer.

Immediately after a TX write error, this returns the DMA position recorded at ring buffer reset time — use it to compute frame-alignment padding without NDTR timing uncertainty.

pub async fn write_immediate( &mut self, data: &[W], ) -> Result<(usize, usize), Error>

Write data directly to the raw I2S ringbuffer. This can be used to fill the buffer before starting the DMA transfer.