Struct embassy_stm32::timer::low_level::Timer

pub struct Timer<'d, T: CoreInstance> { /* private fields */ }

Low-level timer driver.

Implementations

impl<'d, T: CoreInstance> Timer<'d, T>

pub fn new(tim: impl Peripheral<P = T> + 'd) -> Self

Create a new timer driver.

pub fn regs_core(&self) -> TimCore

Get access to the virutal core 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

pub fn start(&self)

Start the timer.

pub fn stop(&self)

Stop the timer.

pub fn reset(&self)

Reset the counter value to 0

pub fn set_frequency(&self, frequency: Hertz)

Set the frequency of how many times per second the timer counts up to the max value or down to 0.

This means that in the default edge-aligned mode, the timer counter will wrap around at the same frequency as is being set. In center-aligned mode (which not all timers support), the wrap-around frequency is effectively halved because it needs to count up and down.

pub fn clear_update_interrupt(&self) -> bool

Clear update interrupt.

Returns whether the update interrupt flag was set.

pub fn enable_update_interrupt(&self, enable: bool)

Enable/disable the update interrupt.

pub fn set_autoreload_preload(&self, enable: bool)

Enable/disable autoreload preload.

pub fn get_frequency(&self) -> Hertz

Get the timer frequency.

impl<'d, T: BasicNoCr2Instance> Timer<'d, T>

pub fn regs_basic_no_cr2(&self) -> TimBasicNoCr2

Get access to the Baisc 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

pub fn enable_update_dma(&self, enable: bool)

Enable/disable the update dma.

pub fn get_update_dma_state(&self) -> bool

Get the update dma enable/disable state.

impl<'d, T: BasicInstance> Timer<'d, T>

pub fn regs_basic(&self) -> TimBasic

Get access to the Baisc 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

impl<'d, T: GeneralInstance1Channel> Timer<'d, T>

pub fn regs_1ch(&self) -> Tim1ch

Get access to the general purpose 1 channel 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

pub fn set_clock_division(&self, ckd: Ckd)

Set clock divider.

pub fn get_max_compare_value(&self) -> u32

Get max compare value. This depends on the timer frequency and the clock frequency from RCC.

impl<'d, T: GeneralInstance2Channel> Timer<'d, T>

pub fn regs_2ch(&self) -> Tim2ch

Get access to the general purpose 2 channel 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

impl<'d, T: GeneralInstance4Channel> Timer<'d, T>

pub fn regs_gp16(&self) -> TimGp16

Get access to the general purpose 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

pub fn enable_outputs(&self)

Enable timer outputs.

pub fn set_counting_mode(&self, mode: CountingMode)

Set counting mode.

pub fn get_counting_mode(&self) -> CountingMode

Get counting mode.

pub fn set_input_capture_filter(&self, channel: Channel, icf: FilterValue)

Set input capture filter.

pub fn clear_input_interrupt(&self, channel: Channel)

Clear input interrupt.

pub fn enable_input_interrupt(&self, channel: Channel, enable: bool)

Enable input interrupt.

pub fn set_input_capture_prescaler(&self, channel: Channel, factor: u8)

Set input capture prescaler.

pub fn set_input_ti_selection(&self, channel: Channel, tisel: InputTISelection)

Set input TI selection.

pub fn set_input_capture_mode(&self, channel: Channel, mode: InputCaptureMode)

Set input capture mode.

pub fn set_output_compare_mode(&self, channel: Channel, mode: OutputCompareMode)

Set output compare mode.

pub fn set_output_polarity(&self, channel: Channel, polarity: OutputPolarity)

Set output polarity.

pub fn enable_channel(&self, channel: Channel, enable: bool)

Enable/disable a channel.

pub fn get_channel_enable_state(&self, channel: Channel) -> bool

Get enable/disable state of a channel

pub fn set_compare_value(&self, channel: Channel, value: u32)

Set compare value for a channel.

pub fn get_compare_value(&self, channel: Channel) -> u32

Get compare value for a channel.

pub fn get_capture_value(&self, channel: Channel) -> u32

Get capture value for a channel.

pub fn set_output_compare_preload(&self, channel: Channel, preload: bool)

Set output compare preload.

pub fn get_cc_dma_selection(&self) -> Ccds

Get capture compare DMA selection

pub fn set_cc_dma_selection(&self, ccds: Ccds)

Set capture compare DMA selection

pub fn get_cc_dma_enable_state(&self, channel: Channel) -> bool

Get capture compare DMA enable state

pub fn set_cc_dma_enable_state(&self, channel: Channel, ccde: bool)

Set capture compare DMA enable state

impl<'d, T: GeneralInstance32bit4Channel> Timer<'d, T>

pub fn regs_gp32(&self) -> TimGp32

Get access to the general purpose 32bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

impl<'d, T: AdvancedInstance1Channel> Timer<'d, T>

pub fn regs_1ch_cmp(&self) -> Tim1chCmp

Get access to the general purpose 1 channel with one complementary 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

pub fn set_dead_time_clock_division(&self, value: Ckd)

Set clock divider for the dead time.

pub fn set_dead_time_value(&self, value: u8)

Set dead time, as a fraction of the max duty value.

pub fn set_moe(&self, enable: bool)

Set state of MOE-bit in BDTR register to en-/disable output

impl<'d, T: AdvancedInstance2Channel> Timer<'d, T>

pub fn regs_2ch_cmp(&self) -> Tim2chCmp

Get access to the general purpose 2 channel with one complementary 16bit timer registers.

Note: This works even if the timer is more capable, because registers for the less capable timers are a subset. This allows writing a driver for a given set of capabilities, and having it transparently work with more capable timers.

impl<'d, T: AdvancedInstance4Channel> Timer<'d, T>

pub fn regs_advanced(&self) -> TimAdv

Get access to the advanced timer registers.

pub fn set_complementary_output_polarity( &self, channel: Channel, polarity: OutputPolarity )

Set complementary output polarity.

pub fn enable_complementary_channel(&self, channel: Channel, enable: bool)

Enable/disable a complementary channel.

Trait Implementations

impl<'d, T: CoreInstance> Drop for Timer<'d, T>

fn drop(&mut self)

Executes the destructor for this type.