Enum Interrupt
pub enum Interrupt {
Show 107 variants
WWDG = 0,
PVD_PVM = 1,
RTC = 2,
RTC_S = 3,
TAMP = 4,
TAMP_S = 5,
FLASH = 6,
FLASH_S = 7,
GTZC = 8,
RCC = 9,
RCC_S = 10,
EXTI0 = 11,
EXTI1 = 12,
EXTI2 = 13,
EXTI3 = 14,
EXTI4 = 15,
EXTI5 = 16,
EXTI6 = 17,
EXTI7 = 18,
EXTI8 = 19,
EXTI9 = 20,
EXTI10 = 21,
EXTI11 = 22,
EXTI12 = 23,
EXTI13 = 24,
EXTI14 = 25,
EXTI15 = 26,
DMAMUX1 = 27,
DMAMUX1_S = 28,
DMA1_CHANNEL1 = 29,
DMA1_CHANNEL2 = 30,
DMA1_CHANNEL3 = 31,
DMA1_CHANNEL4 = 32,
DMA1_CHANNEL5 = 33,
DMA1_CHANNEL6 = 34,
DMA1_CHANNEL7 = 35,
DMA1_CHANNEL8 = 36,
ADC1_2 = 37,
DAC = 38,
FDCAN1_IT0 = 39,
FDCAN1_IT1 = 40,
TIM1_BRK = 41,
TIM1_UP = 42,
TIM1_TRG_COM = 43,
TIM1_CC = 44,
TIM2 = 45,
TIM3 = 46,
TIM4 = 47,
TIM5 = 48,
TIM6 = 49,
TIM7 = 50,
TIM8_BRK = 51,
TIM8_UP = 52,
TIM8_TRG_COM = 53,
TIM8_CC = 54,
I2C1_EV = 55,
I2C1_ER = 56,
I2C2_EV = 57,
I2C2_ER = 58,
SPI1 = 59,
SPI2 = 60,
USART1 = 61,
USART2 = 62,
USART3 = 63,
UART4 = 64,
UART5 = 65,
LPUART1 = 66,
LPTIM1 = 67,
LPTIM2 = 68,
TIM15 = 69,
TIM16 = 70,
TIM17 = 71,
COMP = 72,
USB_FS = 73,
CRS = 74,
FMC = 75,
OCTOSPI1 = 76,
SDMMC1 = 78,
DMA2_CHANNEL1 = 80,
DMA2_CHANNEL2 = 81,
DMA2_CHANNEL3 = 82,
DMA2_CHANNEL4 = 83,
DMA2_CHANNEL5 = 84,
DMA2_CHANNEL6 = 85,
DMA2_CHANNEL7 = 86,
DMA2_CHANNEL8 = 87,
I2C3_EV = 88,
I2C3_ER = 89,
SAI1 = 90,
SAI2 = 91,
TSC = 92,
AES = 93,
RNG = 94,
FPU = 95,
HASH = 96,
PKA = 97,
LPTIM3 = 98,
SPI3 = 99,
I2C4_ER = 100,
I2C4_EV = 101,
DFSDM1_FLT0 = 102,
DFSDM1_FLT1 = 103,
DFSDM1_FLT2 = 104,
DFSDM1_FLT3 = 105,
UCPD1 = 106,
ICACHE = 107,
OTFDEC1 = 108,
}
Variants§
WWDG = 0
0 - WWDG
PVD_PVM = 1
1 - PVD_PVM
RTC = 2
2 - RTC
RTC_S = 3
3 - RTC_S
TAMP = 4
4 - TAMP
TAMP_S = 5
5 - TAMP_S
FLASH = 6
6 - FLASH
FLASH_S = 7
7 - FLASH_S
GTZC = 8
8 - GTZC
RCC = 9
9 - RCC
RCC_S = 10
10 - RCC_S
EXTI0 = 11
11 - EXTI0
EXTI1 = 12
12 - EXTI1
EXTI2 = 13
13 - EXTI2
EXTI3 = 14
14 - EXTI3
EXTI4 = 15
15 - EXTI4
EXTI5 = 16
16 - EXTI5
EXTI6 = 17
17 - EXTI6
EXTI7 = 18
18 - EXTI7
EXTI8 = 19
19 - EXTI8
EXTI9 = 20
20 - EXTI9
EXTI10 = 21
21 - EXTI10
EXTI11 = 22
22 - EXTI11
EXTI12 = 23
23 - EXTI12
EXTI13 = 24
24 - EXTI13
EXTI14 = 25
25 - EXTI14
EXTI15 = 26
26 - EXTI15
DMAMUX1 = 27
27 - DMAMUX1
DMAMUX1_S = 28
28 - DMAMUX1_S
DMA1_CHANNEL1 = 29
29 - DMA1_CHANNEL1
DMA1_CHANNEL2 = 30
30 - DMA1_CHANNEL2
DMA1_CHANNEL3 = 31
31 - DMA1_CHANNEL3
DMA1_CHANNEL4 = 32
32 - DMA1_CHANNEL4
DMA1_CHANNEL5 = 33
33 - DMA1_CHANNEL5
DMA1_CHANNEL6 = 34
34 - DMA1_CHANNEL6
DMA1_CHANNEL7 = 35
35 - DMA1_CHANNEL7
DMA1_CHANNEL8 = 36
36 - DMA1_CHANNEL8
ADC1_2 = 37
37 - ADC1_2
DAC = 38
38 - DAC
FDCAN1_IT0 = 39
39 - FDCAN1_IT0
FDCAN1_IT1 = 40
40 - FDCAN1_IT1
TIM1_BRK = 41
41 - TIM1_BRK
TIM1_UP = 42
42 - TIM1_UP
TIM1_TRG_COM = 43
43 - TIM1_TRG_COM
TIM1_CC = 44
44 - TIM1_CC
TIM2 = 45
45 - TIM2
TIM3 = 46
46 - TIM3
TIM4 = 47
47 - TIM4
TIM5 = 48
48 - TIM5
TIM6 = 49
49 - TIM6
TIM7 = 50
50 - TIM7
TIM8_BRK = 51
51 - TIM8_BRK
TIM8_UP = 52
52 - TIM8_UP
TIM8_TRG_COM = 53
53 - TIM8_TRG_COM
TIM8_CC = 54
54 - TIM8_CC
I2C1_EV = 55
55 - I2C1_EV
I2C1_ER = 56
56 - I2C1_ER
I2C2_EV = 57
57 - I2C2_EV
I2C2_ER = 58
58 - I2C2_ER
SPI1 = 59
59 - SPI1
SPI2 = 60
60 - SPI2
USART1 = 61
61 - USART1
USART2 = 62
62 - USART2
USART3 = 63
63 - USART3
UART4 = 64
64 - UART4
UART5 = 65
65 - UART5
LPUART1 = 66
66 - LPUART1
LPTIM1 = 67
67 - LPTIM1
LPTIM2 = 68
68 - LPTIM2
TIM15 = 69
69 - TIM15
TIM16 = 70
70 - TIM16
TIM17 = 71
71 - TIM17
COMP = 72
72 - COMP
USB_FS = 73
73 - USB_FS
CRS = 74
74 - CRS
FMC = 75
75 - FMC
OCTOSPI1 = 76
76 - OCTOSPI1
SDMMC1 = 78
78 - SDMMC1
DMA2_CHANNEL1 = 80
80 - DMA2_CHANNEL1
DMA2_CHANNEL2 = 81
81 - DMA2_CHANNEL2
DMA2_CHANNEL3 = 82
82 - DMA2_CHANNEL3
DMA2_CHANNEL4 = 83
83 - DMA2_CHANNEL4
DMA2_CHANNEL5 = 84
84 - DMA2_CHANNEL5
DMA2_CHANNEL6 = 85
85 - DMA2_CHANNEL6
DMA2_CHANNEL7 = 86
86 - DMA2_CHANNEL7
DMA2_CHANNEL8 = 87
87 - DMA2_CHANNEL8
I2C3_EV = 88
88 - I2C3_EV
I2C3_ER = 89
89 - I2C3_ER
SAI1 = 90
90 - SAI1
SAI2 = 91
91 - SAI2
TSC = 92
92 - TSC
AES = 93
93 - AES
RNG = 94
94 - RNG
FPU = 95
95 - FPU
HASH = 96
96 - HASH
PKA = 97
97 - PKA
LPTIM3 = 98
98 - LPTIM3
SPI3 = 99
99 - SPI3
I2C4_ER = 100
100 - I2C4_ER
I2C4_EV = 101
101 - I2C4_EV
DFSDM1_FLT0 = 102
102 - DFSDM1_FLT0
DFSDM1_FLT1 = 103
103 - DFSDM1_FLT1
DFSDM1_FLT2 = 104
104 - DFSDM1_FLT2
DFSDM1_FLT3 = 105
105 - DFSDM1_FLT3
UCPD1 = 106
106 - UCPD1
ICACHE = 107
107 - ICACHE
OTFDEC1 = 108
108 - OTFDEC1
Trait Implementations§
§impl InterruptNumber for Interrupt
impl InterruptNumber for Interrupt
impl Copy for Interrupt
impl Eq for Interrupt
impl StructuralPartialEq for Interrupt
Auto Trait Implementations§
impl Freeze for Interrupt
impl RefUnwindSafe for Interrupt
impl Send for Interrupt
impl Sync for Interrupt
impl Unpin for Interrupt
impl UnwindSafe for Interrupt
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
Source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)