Enum embassy_stm32::interrupt::Interrupt

pub enum Interrupt {
    WWDG = 0,
    PVD_PVM = 1,
    RTC = 2,
    RTC_S = 3,
    TAMP = 4,
    RAMCFG = 5,
    FLASH = 6,
    FLASH_S = 7,
    GTZC = 8,
    RCC = 9,
    RCC_S = 10,
    EXTI0 = 11,
    EXTI1 = 12,
    EXTI2 = 13,
    EXTI3 = 14,
    EXTI4 = 15,
    EXTI5 = 16,
    EXTI6 = 17,
    EXTI7 = 18,
    EXTI8 = 19,
    EXTI9 = 20,
    EXTI10 = 21,
    EXTI11 = 22,
    EXTI12 = 23,
    EXTI13 = 24,
    EXTI14 = 25,
    EXTI15 = 26,
    IWDG = 27,
    GPDMA1_CHANNEL0 = 29,
    GPDMA1_CHANNEL1 = 30,
    GPDMA1_CHANNEL2 = 31,
    GPDMA1_CHANNEL3 = 32,
    GPDMA1_CHANNEL4 = 33,
    GPDMA1_CHANNEL5 = 34,
    GPDMA1_CHANNEL6 = 35,
    GPDMA1_CHANNEL7 = 36,
    ADC1 = 37,
    DAC1 = 38,
    FDCAN1_IT0 = 39,
    FDCAN1_IT1 = 40,
    TIM1_BRK = 41,
    TIM1_UP = 42,
    TIM1_TRG_COM = 43,
    TIM1_CC = 44,
    TIM2 = 45,
    TIM3 = 46,
    TIM4 = 47,
    TIM5 = 48,
    TIM6 = 49,
    TIM7 = 50,
    TIM8_BRK = 51,
    TIM8_UP = 52,
    TIM8_TRG_COM = 53,
    TIM8_CC = 54,
    I2C1_EV = 55,
    I2C1_ER = 56,
    I2C2_EV = 57,
    I2C2_ER = 58,
    SPI1 = 59,
    SPI2 = 60,
    USART1 = 61,
    USART3 = 63,
    UART4 = 64,
    UART5 = 65,
    LPUART1 = 66,
    LPTIM1 = 67,
    LPTIM2 = 68,
    TIM15 = 69,
    TIM16 = 70,
    TIM17 = 71,
    COMP = 72,
    USB = 73,
    CRS = 74,
    OCTOSPI1 = 76,
    PWR_S3WU = 77,
    SDMMC1 = 78,
    GPDMA1_CHANNEL8 = 80,
    GPDMA1_CHANNEL9 = 81,
    GPDMA1_CHANNEL10 = 82,
    GPDMA1_CHANNEL11 = 83,
    GPDMA1_CHANNEL12 = 84,
    GPDMA1_CHANNEL13 = 85,
    GPDMA1_CHANNEL14 = 86,
    GPDMA1_CHANNEL15 = 87,
    I2C3_EV = 88,
    I2C3_ER = 89,
    SAI1 = 90,
    TSC = 92,
    RNG = 94,
    FPU = 95,
    HASH = 96,
    LPTIM3 = 98,
    SPI3 = 99,
    I2C4_ER = 100,
    I2C4_EV = 101,
    MDF1_FLT0 = 102,
    MDF1_FLT1 = 103,
    ICACHE = 107,
    LPTIM4 = 110,
    DCACHE1 = 111,
    ADF1 = 112,
    ADC4 = 113,
    LPDMA1_CHANNEL0 = 114,
    LPDMA1_CHANNEL1 = 115,
    LPDMA1_CHANNEL2 = 116,
    LPDMA1_CHANNEL3 = 117,
    DCMI_PSSI = 119,
    CORDIC = 123,
    FMAC = 124,
    LSECSSD = 125,
}

Variants

WWDG = 0

0 - WWDG

PVD_PVM = 1

1 - PVD_PVM

RTC = 2

2 - RTC

RTC_S = 3

3 - RTC_S

TAMP = 4

4 - TAMP

RAMCFG = 5

5 - RAMCFG

FLASH = 6

6 - FLASH

FLASH_S = 7

7 - FLASH_S

GTZC = 8

8 - GTZC

RCC = 9

9 - RCC

RCC_S = 10

10 - RCC_S

EXTI0 = 11

11 - EXTI0

EXTI1 = 12

12 - EXTI1

EXTI2 = 13

13 - EXTI2

EXTI3 = 14

14 - EXTI3

EXTI4 = 15

15 - EXTI4

EXTI5 = 16

16 - EXTI5

EXTI6 = 17

17 - EXTI6

EXTI7 = 18

18 - EXTI7

EXTI8 = 19

19 - EXTI8

EXTI9 = 20

20 - EXTI9

EXTI10 = 21

21 - EXTI10

EXTI11 = 22

22 - EXTI11

EXTI12 = 23

23 - EXTI12

EXTI13 = 24

24 - EXTI13

EXTI14 = 25

25 - EXTI14

EXTI15 = 26

26 - EXTI15

IWDG = 27

27 - IWDG

GPDMA1_CHANNEL0 = 29

29 - GPDMA1_CHANNEL0

GPDMA1_CHANNEL1 = 30

30 - GPDMA1_CHANNEL1

GPDMA1_CHANNEL2 = 31

31 - GPDMA1_CHANNEL2

GPDMA1_CHANNEL3 = 32

32 - GPDMA1_CHANNEL3

GPDMA1_CHANNEL4 = 33

33 - GPDMA1_CHANNEL4

GPDMA1_CHANNEL5 = 34

34 - GPDMA1_CHANNEL5

GPDMA1_CHANNEL6 = 35

35 - GPDMA1_CHANNEL6

GPDMA1_CHANNEL7 = 36

36 - GPDMA1_CHANNEL7

ADC1 = 37

37 - ADC1

DAC1 = 38

38 - DAC1

FDCAN1_IT0 = 39

39 - FDCAN1_IT0

FDCAN1_IT1 = 40

40 - FDCAN1_IT1

TIM1_BRK = 41

41 - TIM1_BRK

TIM1_UP = 42

42 - TIM1_UP

TIM1_TRG_COM = 43

43 - TIM1_TRG_COM

TIM1_CC = 44

44 - TIM1_CC

TIM2 = 45

45 - TIM2

TIM3 = 46

46 - TIM3

TIM4 = 47

47 - TIM4

TIM5 = 48

48 - TIM5

TIM6 = 49

49 - TIM6

TIM7 = 50

50 - TIM7

TIM8_BRK = 51

51 - TIM8_BRK

TIM8_UP = 52

52 - TIM8_UP

TIM8_TRG_COM = 53

53 - TIM8_TRG_COM

TIM8_CC = 54

54 - TIM8_CC

I2C1_EV = 55

55 - I2C1_EV

I2C1_ER = 56

56 - I2C1_ER

I2C2_EV = 57

57 - I2C2_EV

I2C2_ER = 58

58 - I2C2_ER

SPI1 = 59

59 - SPI1

SPI2 = 60

60 - SPI2

USART1 = 61

61 - USART1

USART3 = 63

63 - USART3

UART4 = 64

64 - UART4

UART5 = 65

65 - UART5

LPUART1 = 66

66 - LPUART1

LPTIM1 = 67

67 - LPTIM1

LPTIM2 = 68

68 - LPTIM2

TIM15 = 69

69 - TIM15

TIM16 = 70

70 - TIM16

TIM17 = 71

71 - TIM17

COMP = 72

72 - COMP

USB = 73

73 - USB

CRS = 74

74 - CRS

OCTOSPI1 = 76

76 - OCTOSPI1

PWR_S3WU = 77

77 - PWR_S3WU

SDMMC1 = 78

78 - SDMMC1

GPDMA1_CHANNEL8 = 80

80 - GPDMA1_CHANNEL8

GPDMA1_CHANNEL9 = 81

81 - GPDMA1_CHANNEL9

GPDMA1_CHANNEL10 = 82

82 - GPDMA1_CHANNEL10

GPDMA1_CHANNEL11 = 83

83 - GPDMA1_CHANNEL11

GPDMA1_CHANNEL12 = 84

84 - GPDMA1_CHANNEL12

GPDMA1_CHANNEL13 = 85

85 - GPDMA1_CHANNEL13

GPDMA1_CHANNEL14 = 86

86 - GPDMA1_CHANNEL14

GPDMA1_CHANNEL15 = 87

87 - GPDMA1_CHANNEL15

I2C3_EV = 88

88 - I2C3_EV

I2C3_ER = 89

89 - I2C3_ER

SAI1 = 90

90 - SAI1

TSC = 92

92 - TSC

RNG = 94

94 - RNG

FPU = 95

95 - FPU

HASH = 96

96 - HASH

LPTIM3 = 98

98 - LPTIM3

SPI3 = 99

99 - SPI3

I2C4_ER = 100

100 - I2C4_ER

I2C4_EV = 101

101 - I2C4_EV

MDF1_FLT0 = 102

102 - MDF1_FLT0

MDF1_FLT1 = 103

103 - MDF1_FLT1

ICACHE = 107

107 - ICACHE

LPTIM4 = 110

110 - LPTIM4

DCACHE1 = 111

111 - DCACHE1

ADF1 = 112

112 - ADF1

ADC4 = 113

113 - ADC4

LPDMA1_CHANNEL0 = 114

114 - LPDMA1_CHANNEL0

LPDMA1_CHANNEL1 = 115

115 - LPDMA1_CHANNEL1

LPDMA1_CHANNEL2 = 116

116 - LPDMA1_CHANNEL2

LPDMA1_CHANNEL3 = 117

117 - LPDMA1_CHANNEL3

DCMI_PSSI = 119

119 - DCMI_PSSI

CORDIC = 123

123 - CORDIC

FMAC = 124

124 - FMAC

LSECSSD = 125

125 - LSECSSD

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt