#[repr(transparent)]pub struct Xfercfg(pub u32);Expand description
Transfer configuration register for DMA channel .
Tuple Fields§
§0: u32Implementations§
Source§impl Xfercfg
impl Xfercfg
Sourcepub const fn cfgvalid(&self) -> bool
pub const fn cfgvalid(&self) -> bool
Configuration Valid flag. This bit indicates whether the current channel descriptor is valid and can potentially be acted upon, if all other activation criteria are fulfilled.
Sourcepub const fn set_cfgvalid(&mut self, val: bool)
pub const fn set_cfgvalid(&mut self, val: bool)
Configuration Valid flag. This bit indicates whether the current channel descriptor is valid and can potentially be acted upon, if all other activation criteria are fulfilled.
Sourcepub const fn reload(&self) -> bool
pub const fn reload(&self) -> bool
Indicates whether the channel’s control structure will be reloaded when the current descriptor is exhausted. Reloading allows ping-pong and linked transfers.
Sourcepub const fn set_reload(&mut self, val: bool)
pub const fn set_reload(&mut self, val: bool)
Indicates whether the channel’s control structure will be reloaded when the current descriptor is exhausted. Reloading allows ping-pong and linked transfers.
Sourcepub const fn set_swtrig(&mut self, val: bool)
pub const fn set_swtrig(&mut self, val: bool)
Software Trigger.
Sourcepub const fn set_clrtrig(&mut self, val: bool)
pub const fn set_clrtrig(&mut self, val: bool)
Clear Trigger.
Sourcepub const fn setinta(&self) -> bool
pub const fn setinta(&self) -> bool
Set Interrupt flag A for this channel. There is no hardware distinction between interrupt A and B. They can be used by software to assist with more complex descriptor usage. By convention, interrupt A may be used when only one interrupt flag is needed.
Sourcepub const fn set_setinta(&mut self, val: bool)
pub const fn set_setinta(&mut self, val: bool)
Set Interrupt flag A for this channel. There is no hardware distinction between interrupt A and B. They can be used by software to assist with more complex descriptor usage. By convention, interrupt A may be used when only one interrupt flag is needed.
Sourcepub const fn setintb(&self) -> bool
pub const fn setintb(&self) -> bool
Set Interrupt flag B for this channel. There is no hardware distinction between interrupt A and B. They can be used by software to assist with more complex descriptor usage. By convention, interrupt A may be used when only one interrupt flag is needed.
Sourcepub const fn set_setintb(&mut self, val: bool)
pub const fn set_setintb(&mut self, val: bool)
Set Interrupt flag B for this channel. There is no hardware distinction between interrupt A and B. They can be used by software to assist with more complex descriptor usage. By convention, interrupt A may be used when only one interrupt flag is needed.
Sourcepub const fn srcinc(&self) -> Srcinc
pub const fn srcinc(&self) -> Srcinc
Determines whether the source address is incremented for each DMA transfer.
Sourcepub const fn set_srcinc(&mut self, val: Srcinc)
pub const fn set_srcinc(&mut self, val: Srcinc)
Determines whether the source address is incremented for each DMA transfer.
Sourcepub const fn dstinc(&self) -> Dstinc
pub const fn dstinc(&self) -> Dstinc
Determines whether the destination address is incremented for each DMA transfer.
Sourcepub const fn set_dstinc(&mut self, val: Dstinc)
pub const fn set_dstinc(&mut self, val: Dstinc)
Determines whether the destination address is incremented for each DMA transfer.
Sourcepub const fn xfercount(&self) -> u16
pub const fn xfercount(&self) -> u16
Total number of transfers to be performed, minus 1 encoded. The number of bytes transferred is: (XFERCOUNT + 1) x data width (as defined by the WIDTH field). The DMA controller uses this bit field during transfer to count down. Hence, it cannot be used by software to read back the size of the transfer, for instance, in an interrupt handler. 0x0 = a total of 1 transfer will be performed. 0x1 = a total of 2 transfers will be performed. 0x3FF = a total of 1,024 transfers will be performed.
Sourcepub const fn set_xfercount(&mut self, val: u16)
pub const fn set_xfercount(&mut self, val: u16)
Total number of transfers to be performed, minus 1 encoded. The number of bytes transferred is: (XFERCOUNT + 1) x data width (as defined by the WIDTH field). The DMA controller uses this bit field during transfer to count down. Hence, it cannot be used by software to read back the size of the transfer, for instance, in an interrupt handler. 0x0 = a total of 1 transfer will be performed. 0x1 = a total of 2 transfers will be performed. 0x3FF = a total of 1,024 transfers will be performed.