#[repr(transparent)]pub struct Aoreg1(pub u32);Expand description
General purpose always on domain data storage [Reset by: PoR, Brown Out Detectors Reset]
Tuple Fields§
§0: u32Implementations§
Source§impl Aoreg1
impl Aoreg1
Sourcepub const fn set_padreset(&mut self, val: bool)
pub const fn set_padreset(&mut self, val: bool)
The last chip reset was caused by a Pin Reset.
Sourcepub const fn bodreset(&self) -> bool
pub const fn bodreset(&self) -> bool
The last chip reset was caused by a Brown Out Detector (BoD), either VBAT BoD or Core Logic BoD.
Sourcepub const fn set_bodreset(&mut self, val: bool)
pub const fn set_bodreset(&mut self, val: bool)
The last chip reset was caused by a Brown Out Detector (BoD), either VBAT BoD or Core Logic BoD.
Sourcepub const fn systemreset(&self) -> bool
pub const fn systemreset(&self) -> bool
The last chip reset was caused by a System Reset requested by the ARM CPU.
Sourcepub const fn set_systemreset(&mut self, val: bool)
pub const fn set_systemreset(&mut self, val: bool)
The last chip reset was caused by a System Reset requested by the ARM CPU.
Sourcepub const fn set_wdtreset(&mut self, val: bool)
pub const fn set_wdtreset(&mut self, val: bool)
The last chip reset was caused by the Watchdog Timer.
Sourcepub const fn set_swrreset(&mut self, val: bool)
pub const fn set_swrreset(&mut self, val: bool)
The last chip reset was caused by a Software event.
Sourcepub const fn dpdreset_wakeupio(&self) -> bool
pub const fn dpdreset_wakeupio(&self) -> bool
The last chip reset was caused by a Wake-up I/O reset event during a Deep Power-Down mode.
Sourcepub const fn set_dpdreset_wakeupio(&mut self, val: bool)
pub const fn set_dpdreset_wakeupio(&mut self, val: bool)
The last chip reset was caused by a Wake-up I/O reset event during a Deep Power-Down mode.
Sourcepub const fn dpdreset_rtc(&self) -> bool
pub const fn dpdreset_rtc(&self) -> bool
The last chip reset was caused by an RTC (either RTC Alarm or RTC wake up) reset event during a Deep Power-Down mode.
Sourcepub const fn set_dpdreset_rtc(&mut self, val: bool)
pub const fn set_dpdreset_rtc(&mut self, val: bool)
The last chip reset was caused by an RTC (either RTC Alarm or RTC wake up) reset event during a Deep Power-Down mode.
Sourcepub const fn dpdreset_ostimer(&self) -> bool
pub const fn dpdreset_ostimer(&self) -> bool
The last chip reset was caused by an OS Event Timer reset event during a Deep Power-Down mode.
Sourcepub const fn set_dpdreset_ostimer(&mut self, val: bool)
pub const fn set_dpdreset_ostimer(&mut self, val: bool)
The last chip reset was caused by an OS Event Timer reset event during a Deep Power-Down mode.
Sourcepub const fn booterrorcounter(&self) -> u8
pub const fn booterrorcounter(&self) -> u8
ROM Boot Fatal Error Counter.
Sourcepub const fn set_booterrorcounter(&mut self, val: u8)
pub const fn set_booterrorcounter(&mut self, val: u8)
ROM Boot Fatal Error Counter.