Struct CtrlClr 

#[repr(transparent)]
pub struct CtrlClr(pub u32);

USB PHY General Control Register

Tuple Fields

0: u32

Implementations

impl CtrlClr

pub const fn enhostdiscondetect(&self) -> bool

For host mode, enables high-speed disconnect detector

pub const fn set_enhostdiscondetect(&mut self, val: bool)

For host mode, enables high-speed disconnect detector

pub const fn enirqhostdiscon(&self) -> bool

Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode

pub const fn set_enirqhostdiscon(&mut self, val: bool)

Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode

pub const fn hostdiscondetect_irq(&self) -> bool

Indicates that the device has disconnected in High-Speed mode

pub const fn set_hostdiscondetect_irq(&mut self, val: bool)

Indicates that the device has disconnected in High-Speed mode

pub const fn endevplugindet(&self) -> CtrlClrEndevplugindet

Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode

pub const fn set_endevplugindet(&mut self, val: CtrlClrEndevplugindet)

Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode

pub const fn devplugin_polarity(&self) -> bool

Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in

pub const fn set_devplugin_polarity(&mut self, val: bool)

Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in

pub const fn resumeirqsticky(&self) -> bool

Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it

pub const fn set_resumeirqsticky(&mut self, val: bool)

Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it

pub const fn enirqresumedetect(&self) -> bool

Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line

pub const fn set_enirqresumedetect(&mut self, val: bool)

Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line

pub const fn resume_irq(&self) -> bool

Resume IRQ: Indicates that the host is sending a wake-up after suspend

pub const fn set_resume_irq(&mut self, val: bool)

Resume IRQ: Indicates that the host is sending a wake-up after suspend

pub const fn devplugin_irq(&self) -> bool

Indicates that the device is connected

pub const fn set_devplugin_irq(&mut self, val: bool)

Indicates that the device is connected

pub const fn enutmilevel2(&self) -> bool

Enables UTMI+ Level 2 operation for the USB HS PHY

pub const fn set_enutmilevel2(&mut self, val: bool)

Enables UTMI+ Level 2 operation for the USB HS PHY

pub const fn enutmilevel3(&self) -> bool

Enables UTMI+ Level 3 operation for the USB HS PHY

pub const fn set_enutmilevel3(&mut self, val: bool)

Enables UTMI+ Level 3 operation for the USB HS PHY

pub const fn enirqwakeup(&self) -> bool

Enable wake-up IRQ: Enables interrupt for the wake-up events.

pub const fn set_enirqwakeup(&mut self, val: bool)

Enable wake-up IRQ: Enables interrupt for the wake-up events.

pub const fn wakeup_irq(&self) -> bool

Wake-up IRQ: Indicates that there is a wak-eup event

pub const fn set_wakeup_irq(&mut self, val: bool)

Wake-up IRQ: Indicates that there is a wak-eup event

pub const fn autoresume_en(&self) -> bool

Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)

pub const fn set_autoresume_en(&mut self, val: bool)

Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)

pub const fn enautoclr_clkgate(&self) -> bool

Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended

pub const fn set_enautoclr_clkgate(&mut self, val: bool)

Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended

pub const fn enautoclr_phy_pwd(&self) -> bool

Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended

pub const fn set_enautoclr_phy_pwd(&mut self, val: bool)

Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended

pub const fn endpdmchg_wkup(&self) -> bool

Enable DP DM change wake-up: Not for customer use

pub const fn set_endpdmchg_wkup(&mut self, val: bool)

Enable DP DM change wake-up: Not for customer use

pub const fn envbuschg_wkup(&self) -> bool

Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended

pub const fn set_envbuschg_wkup(&mut self, val: bool)

Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended

pub const fn enautoclr_usbclkgate(&self) -> bool

Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended

pub const fn set_enautoclr_usbclkgate(&mut self, val: bool)

Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended

pub const fn enautoset_usbclks(&self) -> bool

Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended

pub const fn set_enautoset_usbclks(&mut self, val: bool)

Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended

pub const fn host_force_ls_se0(&self) -> bool

Forces the next FS packet that is transmitted to have a EOP with low-speed timing

pub const fn set_host_force_ls_se0(&mut self, val: bool)

Forces the next FS packet that is transmitted to have a EOP with low-speed timing

pub const fn utmi_suspendm(&self) -> bool

Used by the PHY to indicate a powered-down state

pub const fn set_utmi_suspendm(&mut self, val: bool)

Used by the PHY to indicate a powered-down state

pub const fn clkgate(&self) -> bool

Gate UTMI Clocks

pub const fn set_clkgate(&mut self, val: bool)

Gate UTMI Clocks

pub const fn sftrst(&self) -> bool

Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers

pub const fn set_sftrst(&mut self, val: bool)

Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers

Trait Implementations

impl Clone for CtrlClr

fn clone(&self) -> CtrlClr

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for CtrlClr

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for CtrlClr

fn default() -> CtrlClr

Returns the “default value” for a type.

impl PartialEq for CtrlClr

fn eq(&self, other: &CtrlClr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for CtrlClr

impl Eq for CtrlClr

impl StructuralPartialEq for CtrlClr