#[repr(transparent)]pub struct Mstctl(pub u32);Expand description
Master control register.
Tuple Fields§
§0: u32Implementations§
Source§impl Mstctl
impl Mstctl
Sourcepub const fn mstcontinue(&self) -> Mstcontinue
pub const fn mstcontinue(&self) -> Mstcontinue
Master Continue. This bit is write-only.
Sourcepub const fn set_mstcontinue(&mut self, val: Mstcontinue)
pub const fn set_mstcontinue(&mut self, val: Mstcontinue)
Master Continue. This bit is write-only.
Sourcepub const fn set_mststart(&mut self, val: Mststart)
pub const fn set_mststart(&mut self, val: Mststart)
Master Start control. This bit is write-only.
Sourcepub const fn set_mststop(&mut self, val: Mststop)
pub const fn set_mststop(&mut self, val: Mststop)
Master Stop control. This bit is write-only.
Sourcepub const fn mstdma(&self) -> bool
pub const fn mstdma(&self) -> bool
Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write.
Sourcepub const fn set_mstdma(&mut self, val: bool)
pub const fn set_mstdma(&mut self, val: bool)
Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write.