pub struct Inputmux { /* private fields */ }Expand description
Input multiplexing (INPUT MUX)
Implementations§
Source§impl Inputmux
impl Inputmux
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn sct0_inmux(self, n: usize) -> Reg<Sct0Inmux, RW>
pub const fn sct0_inmux(self, n: usize) -> Reg<Sct0Inmux, RW>
Input mux register for SCT0 input
Sourcepub const fn timer0captsel(self, n: usize) -> Reg<Timer0captsel, RW>
pub const fn timer0captsel(self, n: usize) -> Reg<Timer0captsel, RW>
Capture select registers for TIMER0 inputs
Sourcepub const fn timer1captsel(self, n: usize) -> Reg<Timer1captsel, RW>
pub const fn timer1captsel(self, n: usize) -> Reg<Timer1captsel, RW>
Capture select registers for TIMER1 inputs
Sourcepub const fn timer2captsel(self, n: usize) -> Reg<Timer2captsel, RW>
pub const fn timer2captsel(self, n: usize) -> Reg<Timer2captsel, RW>
Capture select registers for TIMER2 inputs
Sourcepub const fn dma0_itrig_inmux(self, n: usize) -> Reg<Dma0ItrigInmux, RW>
pub const fn dma0_itrig_inmux(self, n: usize) -> Reg<Dma0ItrigInmux, RW>
Trigger select register for DMA0 channel
Sourcepub const fn dma0_otrig_inmux(self, n: usize) -> Reg<Dma0OtrigInmux, RW>
pub const fn dma0_otrig_inmux(self, n: usize) -> Reg<Dma0OtrigInmux, RW>
DMA0 output trigger selection to become DMA0 trigger
Sourcepub const fn freqmeas_ref(self) -> Reg<FreqmeasRef, RW>
pub const fn freqmeas_ref(self) -> Reg<FreqmeasRef, RW>
Selection for frequency measurement reference clock
Sourcepub const fn freqmeas_target(self) -> Reg<FreqmeasTarget, RW>
pub const fn freqmeas_target(self) -> Reg<FreqmeasTarget, RW>
Selection for frequency measurement target clock
Sourcepub const fn timer3captsel(self, n: usize) -> Reg<Timer3captsel, RW>
pub const fn timer3captsel(self, n: usize) -> Reg<Timer3captsel, RW>
Capture select registers for TIMER3 inputs
Sourcepub const fn timer4captsel(self, n: usize) -> Reg<Timer4captsel, RW>
pub const fn timer4captsel(self, n: usize) -> Reg<Timer4captsel, RW>
Capture select registers for TIMER4 inputs
Sourcepub const fn pintsecsel(self, n: usize) -> Reg<Pintsecsel, RW>
pub const fn pintsecsel(self, n: usize) -> Reg<Pintsecsel, RW>
Pin interrupt secure select register
Sourcepub const fn dma1_itrig_inmux(self, n: usize) -> Reg<Dma1ItrigInmux, RW>
pub const fn dma1_itrig_inmux(self, n: usize) -> Reg<Dma1ItrigInmux, RW>
Trigger select register for DMA1 channel
Sourcepub const fn dma1_otrig_inmux(self, n: usize) -> Reg<Dma1OtrigInmux, RW>
pub const fn dma1_otrig_inmux(self, n: usize) -> Reg<Dma1OtrigInmux, RW>
DMA1 output trigger selection to become DMA1 trigger
Sourcepub const fn dma0_req_ena(self) -> Reg<Dma0ReqEna, RW>
pub const fn dma0_req_ena(self) -> Reg<Dma0ReqEna, RW>
Enable DMA0 requests
Sourcepub const fn dma0_req_ena_set(self) -> Reg<Dma0ReqEnaSet, W>
pub const fn dma0_req_ena_set(self) -> Reg<Dma0ReqEnaSet, W>
Set one or several bits in DMA0_REQ_ENA register
Sourcepub const fn dma0_req_ena_clr(self) -> Reg<Dma0ReqEnaClr, W>
pub const fn dma0_req_ena_clr(self) -> Reg<Dma0ReqEnaClr, W>
Clear one or several bits in DMA0_REQ_ENA register
Sourcepub const fn dma1_req_ena(self) -> Reg<Dma1ReqEna, RW>
pub const fn dma1_req_ena(self) -> Reg<Dma1ReqEna, RW>
Enable DMA1 requests
Sourcepub const fn dma1_req_ena_set(self) -> Reg<Dma1ReqEnaSet, W>
pub const fn dma1_req_ena_set(self) -> Reg<Dma1ReqEnaSet, W>
Set one or several bits in DMA1_REQ_ENA register
Sourcepub const fn dma1_req_ena_clr(self) -> Reg<Dma1ReqEnaClr, W>
pub const fn dma1_req_ena_clr(self) -> Reg<Dma1ReqEnaClr, W>
Clear one or several bits in DMA1_REQ_ENA register
Sourcepub const fn dma0_itrig_ena(self) -> Reg<Dma0ItrigEna, RW>
pub const fn dma0_itrig_ena(self) -> Reg<Dma0ItrigEna, RW>
Enable DMA0 triggers
Sourcepub const fn dma0_itrig_ena_set(self) -> Reg<Dma0ItrigEnaSet, W>
pub const fn dma0_itrig_ena_set(self) -> Reg<Dma0ItrigEnaSet, W>
Set one or several bits in DMA0_ITRIG_ENA register
Sourcepub const fn dma0_itrig_ena_clr(self) -> Reg<Dma0ItrigEnaClr, W>
pub const fn dma0_itrig_ena_clr(self) -> Reg<Dma0ItrigEnaClr, W>
Clear one or several bits in DMA0_ITRIG_ENA register
Sourcepub const fn dma1_itrig_ena(self) -> Reg<Dma1ItrigEna, RW>
pub const fn dma1_itrig_ena(self) -> Reg<Dma1ItrigEna, RW>
Enable DMA1 triggers
Sourcepub const fn dma1_itrig_ena_set(self) -> Reg<Dma1ItrigEnaSet, W>
pub const fn dma1_itrig_ena_set(self) -> Reg<Dma1ItrigEnaSet, W>
Set one or several bits in DMA1_ITRIG_ENA register
Sourcepub const fn dma1_itrig_ena_clr(self) -> Reg<Dma1ItrigEnaClr, W>
pub const fn dma1_itrig_ena_clr(self) -> Reg<Dma1ItrigEnaClr, W>
Clear one or several bits in DMA1_ITRIG_ENA register