pub struct Pmc { /* private fields */ }Expand description
PMC
Implementations§
Source§impl Pmc
impl Pmc
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn status(self) -> Reg<Status, R>
pub const fn status(self) -> Reg<Status, R>
Power Management Controller FSM (Finite State Machines) status
Sourcepub const fn resetctrl(self) -> Reg<Resetctrl, RW>
pub const fn resetctrl(self) -> Reg<Resetctrl, RW>
Reset Control [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn dcdc0(self) -> Reg<Dcdc0, RW>
pub const fn dcdc0(self) -> Reg<Dcdc0, RW>
DCDC (first) control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn dcdc1(self) -> Reg<Dcdc1, RW>
pub const fn dcdc1(self) -> Reg<Dcdc1, RW>
DCDC (second) control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn ldopmu(self) -> Reg<Ldopmu, RW>
pub const fn ldopmu(self) -> Reg<Ldopmu, RW>
Power Management Unit (PMU) and Always-On domains LDO control [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn bodvbat(self) -> Reg<Bodvbat, RW>
pub const fn bodvbat(self) -> Reg<Bodvbat, RW>
VBAT Brown Out Dectector (BoD) control register [Reset by: PoR, Pin Reset, Software Reset]
Sourcepub const fn reffastwkup(self) -> Reg<Reffastwkup, RW>
pub const fn reffastwkup(self) -> Reg<Reffastwkup, RW>
Analog References fast wake-up Control register [Reset by: PoR]
Sourcepub const fn xtal32k(self) -> Reg<Xtal32k, RW>
pub const fn xtal32k(self) -> Reg<Xtal32k, RW>
32 KHz Crystal oscillator (XTAL) control register [Reset by: PoR, Brown Out Detectors Reset]
Sourcepub const fn comp(self) -> Reg<Comp, RW>
pub const fn comp(self) -> Reg<Comp, RW>
Analog Comparator control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn wakeupioctrl(self) -> Reg<Wakeupioctrl, RW>
pub const fn wakeupioctrl(self) -> Reg<Wakeupioctrl, RW>
Deep Power Down wake-up source [Reset by: PoR, Pin Reset, Software Reset]
Sourcepub const fn wakeiocause(self) -> Reg<Wakeiocause, RW>
pub const fn wakeiocause(self) -> Reg<Wakeiocause, RW>
Allows to identify the Wake-up I/O source from Deep Power Down mode
Sourcepub const fn statusclk(self) -> Reg<Statusclk, RW>
pub const fn statusclk(self) -> Reg<Statusclk, RW>
FRO and XTAL status register [Reset by: PoR, Brown Out Detectors Reset]
Sourcepub const fn aoreg1(self) -> Reg<Aoreg1, RW>
pub const fn aoreg1(self) -> Reg<Aoreg1, RW>
General purpose always on domain data storage [Reset by: PoR, Brown Out Detectors Reset]
Sourcepub const fn miscctrl(self) -> Reg<Miscctrl, RW>
pub const fn miscctrl(self) -> Reg<Miscctrl, RW>
Dummy Control bus to PMU [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn rtcosc32k(self) -> Reg<Rtcosc32k, RW>
pub const fn rtcosc32k(self) -> Reg<Rtcosc32k, RW>
RTC 1 KHZ and 1 Hz clocks source control register [Reset by: PoR, Brown Out Detectors Reset]
Sourcepub const fn ostimer(self) -> Reg<Ostimer, RW>
pub const fn ostimer(self) -> Reg<Ostimer, RW>
OS Timer control register [Reset by: PoR, Brown Out Detectors Reset]
Sourcepub const fn pdruncfg0(self) -> Reg<Pdruncfg0, RW>
pub const fn pdruncfg0(self) -> Reg<Pdruncfg0, RW>
Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn pdruncfgset0(self) -> Reg<Pdruncfgset0, W>
pub const fn pdruncfgset0(self) -> Reg<Pdruncfgset0, W>
Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
Sourcepub const fn pdruncfgclr0(self) -> Reg<Pdruncfgclr0, W>
pub const fn pdruncfgclr0(self) -> Reg<Pdruncfgclr0, W>
Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]