nxp_pac::sct0::regs

Struct EvCtrl

#[repr(transparent)]
pub struct EvCtrl(pub u32);

Expand description

SCT event control register 0

Tuple Fields§

§0: u32

Implementations§

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impl EvCtrl

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pub const fn matchsel(&self) -> u8

Selects the Match register associated with this event (if any). A match can occur only when the counter selected by the HEVENT bit is running.

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pub const fn set_matchsel(&mut self, val: u8)

Selects the Match register associated with this event (if any). A match can occur only when the counter selected by the HEVENT bit is running.

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pub const fn hevent(&self) -> Hevent

Select L/H counter. Do not set this bit if UNIFY = 1.

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pub const fn set_hevent(&mut self, val: Hevent)

Select L/H counter. Do not set this bit if UNIFY = 1.

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pub const fn outsel(&self) -> Outsel

Input/output select

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pub const fn set_outsel(&mut self, val: Outsel)

Input/output select

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pub const fn iosel(&self) -> u8

Selects the input or output signal number associated with this event (if any). Do not select an input in this register if CKMODE is 1x. In this case the clock input is an implicit ingredient of every event.

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pub const fn set_iosel(&mut self, val: u8)

Selects the input or output signal number associated with this event (if any). Do not select an input in this register if CKMODE is 1x. In this case the clock input is an implicit ingredient of every event.

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pub const fn iocond(&self) -> Iocond

Selects the I/O condition for event n. (The detection of edges on outputs lag the conditions that switch the outputs by one SCT clock). In order to guarantee proper edge/state detection, an input must have a minimum pulse width of at least one SCT clock period .

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pub const fn set_iocond(&mut self, val: Iocond)

Selects the I/O condition for event n. (The detection of edges on outputs lag the conditions that switch the outputs by one SCT clock). In order to guarantee proper edge/state detection, an input must have a minimum pulse width of at least one SCT clock period .

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pub const fn combmode(&self) -> Combmode

Selects how the specified match and I/O condition are used and combined.

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pub const fn set_combmode(&mut self, val: Combmode)

Selects how the specified match and I/O condition are used and combined.

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pub const fn stateld(&self) -> Stateld

This bit controls how the STATEV value modifies the state selected by HEVENT when this event is the highest-numbered event occurring for that state.

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pub const fn set_stateld(&mut self, val: Stateld)

This bit controls how the STATEV value modifies the state selected by HEVENT when this event is the highest-numbered event occurring for that state.

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pub const fn statev(&self) -> u8

This value is loaded into or added to the state selected by HEVENT, depending on STATELD, when this event is the highest-numbered event occurring for that state. If STATELD and STATEV are both zero, there is no change to the STATE value.

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pub const fn set_statev(&mut self, val: u8)

This value is loaded into or added to the state selected by HEVENT, depending on STATELD, when this event is the highest-numbered event occurring for that state. If STATELD and STATEV are both zero, there is no change to the STATE value.

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pub const fn matchmem(&self) -> bool

If this bit is one and the COMBMODE field specifies a match component to the triggering of this event, then a match is considered to be active whenever the counter value is GREATER THAN OR EQUAL TO the value specified in the match register when counting up, LESS THEN OR EQUAL TO the match value when counting down. If this bit is zero, a match is only be active during the cycle when the counter is equal to the match value.

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pub const fn set_matchmem(&mut self, val: bool)

If this bit is one and the COMBMODE field specifies a match component to the triggering of this event, then a match is considered to be active whenever the counter value is GREATER THAN OR EQUAL TO the value specified in the match register when counting up, LESS THEN OR EQUAL TO the match value when counting down. If this bit is zero, a match is only be active during the cycle when the counter is equal to the match value.

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pub const fn direction(&self) -> Direction

Direction qualifier for event generation. This field only applies when the counters are operating in BIDIR mode. If BIDIR = 0, the SCT ignores this field. Value 0x3 is reserved.

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pub const fn set_direction(&mut self, val: Direction)

Direction qualifier for event generation. This field only applies when the counters are operating in BIDIR mode. If BIDIR = 0, the SCT ignores this field. Value 0x3 is reserved.