#[repr(transparent)]pub struct Ctrl(pub u32);Expand description
USB PHY General Control Register
Tuple Fields§
§0: u32Implementations§
Source§impl Ctrl
impl Ctrl
Sourcepub const fn enhostdiscondetect(&self) -> bool
pub const fn enhostdiscondetect(&self) -> bool
For host mode, enables high-speed disconnect detector
Sourcepub const fn set_enhostdiscondetect(&mut self, val: bool)
pub const fn set_enhostdiscondetect(&mut self, val: bool)
For host mode, enables high-speed disconnect detector
Sourcepub const fn enirqhostdiscon(&self) -> bool
pub const fn enirqhostdiscon(&self) -> bool
Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode
Sourcepub const fn set_enirqhostdiscon(&mut self, val: bool)
pub const fn set_enirqhostdiscon(&mut self, val: bool)
Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode
Sourcepub const fn hostdiscondetect_irq(&self) -> bool
pub const fn hostdiscondetect_irq(&self) -> bool
Indicates that the device has disconnected in High-Speed mode
Sourcepub const fn set_hostdiscondetect_irq(&mut self, val: bool)
pub const fn set_hostdiscondetect_irq(&mut self, val: bool)
Indicates that the device has disconnected in High-Speed mode
Sourcepub const fn endevplugindet(&self) -> CtrlEndevplugindet
pub const fn endevplugindet(&self) -> CtrlEndevplugindet
Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode
Sourcepub const fn set_endevplugindet(&mut self, val: CtrlEndevplugindet)
pub const fn set_endevplugindet(&mut self, val: CtrlEndevplugindet)
Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode
Sourcepub const fn devplugin_polarity(&self) -> bool
pub const fn devplugin_polarity(&self) -> bool
Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in
Sourcepub const fn set_devplugin_polarity(&mut self, val: bool)
pub const fn set_devplugin_polarity(&mut self, val: bool)
Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in
Sourcepub const fn resumeirqsticky(&self) -> bool
pub const fn resumeirqsticky(&self) -> bool
Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it
Sourcepub const fn set_resumeirqsticky(&mut self, val: bool)
pub const fn set_resumeirqsticky(&mut self, val: bool)
Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it
Sourcepub const fn enirqresumedetect(&self) -> bool
pub const fn enirqresumedetect(&self) -> bool
Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line
Sourcepub const fn set_enirqresumedetect(&mut self, val: bool)
pub const fn set_enirqresumedetect(&mut self, val: bool)
Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line
Sourcepub const fn resume_irq(&self) -> bool
pub const fn resume_irq(&self) -> bool
Resume IRQ: Indicates that the host is sending a wake-up after suspend
Sourcepub const fn set_resume_irq(&mut self, val: bool)
pub const fn set_resume_irq(&mut self, val: bool)
Resume IRQ: Indicates that the host is sending a wake-up after suspend
Sourcepub const fn devplugin_irq(&self) -> bool
pub const fn devplugin_irq(&self) -> bool
Indicates that the device is connected
Sourcepub const fn set_devplugin_irq(&mut self, val: bool)
pub const fn set_devplugin_irq(&mut self, val: bool)
Indicates that the device is connected
Sourcepub const fn enutmilevel2(&self) -> bool
pub const fn enutmilevel2(&self) -> bool
Enables UTMI+ Level 2 operation for the USB HS PHY
Sourcepub const fn set_enutmilevel2(&mut self, val: bool)
pub const fn set_enutmilevel2(&mut self, val: bool)
Enables UTMI+ Level 2 operation for the USB HS PHY
Sourcepub const fn enutmilevel3(&self) -> bool
pub const fn enutmilevel3(&self) -> bool
Enables UTMI+ Level 3 operation for the USB HS PHY
Sourcepub const fn set_enutmilevel3(&mut self, val: bool)
pub const fn set_enutmilevel3(&mut self, val: bool)
Enables UTMI+ Level 3 operation for the USB HS PHY
Sourcepub const fn enirqwakeup(&self) -> bool
pub const fn enirqwakeup(&self) -> bool
Enable wake-up IRQ: Enables interrupt for the wake-up events.
Sourcepub const fn set_enirqwakeup(&mut self, val: bool)
pub const fn set_enirqwakeup(&mut self, val: bool)
Enable wake-up IRQ: Enables interrupt for the wake-up events.
Sourcepub const fn wakeup_irq(&self) -> bool
pub const fn wakeup_irq(&self) -> bool
Wake-up IRQ: Indicates that there is a wak-eup event
Sourcepub const fn set_wakeup_irq(&mut self, val: bool)
pub const fn set_wakeup_irq(&mut self, val: bool)
Wake-up IRQ: Indicates that there is a wak-eup event
Sourcepub const fn autoresume_en(&self) -> bool
pub const fn autoresume_en(&self) -> bool
Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)
Sourcepub const fn set_autoresume_en(&mut self, val: bool)
pub const fn set_autoresume_en(&mut self, val: bool)
Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)
Sourcepub const fn enautoclr_clkgate(&self) -> bool
pub const fn enautoclr_clkgate(&self) -> bool
Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended
Sourcepub const fn set_enautoclr_clkgate(&mut self, val: bool)
pub const fn set_enautoclr_clkgate(&mut self, val: bool)
Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended
Sourcepub const fn enautoclr_phy_pwd(&self) -> bool
pub const fn enautoclr_phy_pwd(&self) -> bool
Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended
Sourcepub const fn set_enautoclr_phy_pwd(&mut self, val: bool)
pub const fn set_enautoclr_phy_pwd(&mut self, val: bool)
Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended
Sourcepub const fn endpdmchg_wkup(&self) -> bool
pub const fn endpdmchg_wkup(&self) -> bool
Enable DP DM change wake-up: Not for customer use
Sourcepub const fn set_endpdmchg_wkup(&mut self, val: bool)
pub const fn set_endpdmchg_wkup(&mut self, val: bool)
Enable DP DM change wake-up: Not for customer use
Sourcepub const fn envbuschg_wkup(&self) -> bool
pub const fn envbuschg_wkup(&self) -> bool
Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended
Sourcepub const fn set_envbuschg_wkup(&mut self, val: bool)
pub const fn set_envbuschg_wkup(&mut self, val: bool)
Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended
Sourcepub const fn enautoclr_usbclkgate(&self) -> bool
pub const fn enautoclr_usbclkgate(&self) -> bool
Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
Sourcepub const fn set_enautoclr_usbclkgate(&mut self, val: bool)
pub const fn set_enautoclr_usbclkgate(&mut self, val: bool)
Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
Sourcepub const fn enautoset_usbclks(&self) -> bool
pub const fn enautoset_usbclks(&self) -> bool
Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
Sourcepub const fn set_enautoset_usbclks(&mut self, val: bool)
pub const fn set_enautoset_usbclks(&mut self, val: bool)
Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
Sourcepub const fn host_force_ls_se0(&self) -> bool
pub const fn host_force_ls_se0(&self) -> bool
Forces the next FS packet that is transmitted to have a EOP with low-speed timing
Sourcepub const fn set_host_force_ls_se0(&mut self, val: bool)
pub const fn set_host_force_ls_se0(&mut self, val: bool)
Forces the next FS packet that is transmitted to have a EOP with low-speed timing
Sourcepub const fn utmi_suspendm(&self) -> bool
pub const fn utmi_suspendm(&self) -> bool
Used by the PHY to indicate a powered-down state
Sourcepub const fn set_utmi_suspendm(&mut self, val: bool)
pub const fn set_utmi_suspendm(&mut self, val: bool)
Used by the PHY to indicate a powered-down state
Sourcepub const fn set_clkgate(&mut self, val: bool)
pub const fn set_clkgate(&mut self, val: bool)
Gate UTMI Clocks
Sourcepub const fn sftrst(&self) -> bool
pub const fn sftrst(&self) -> bool
Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers
Sourcepub const fn set_sftrst(&mut self, val: bool)
pub const fn set_sftrst(&mut self, val: bool)
Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers