Enum Timer4trigInp 

#[repr(u8)]
pub enum Timer4trigInp {
    _RESERVED_0 = 0,
    VAL1 = 1,
    VAL2 = 2,
    VAL3 = 3,
    VAL4 = 4,
    VAL5 = 5,
    VAL6 = 6,
    VAL7 = 7,
    VAL8 = 8,
    VAL9 = 9,
    VAL10 = 10,
    VAL11 = 11,
    VAL12 = 12,
    VAL13 = 13,
    VAL14 = 14,
    VAL15 = 15,
    VAL16 = 16,
    VAL17 = 17,
    VAL18 = 18,
    VAL19 = 19,
    VAL20 = 20,
    VAL21 = 21,
    VAL22 = 22,
    VAL23 = 23,
    VAL24 = 24,
    VAL25 = 25,
    VAL26 = 26,
    VAL27 = 27,
    VAL28 = 28,
    VAL29 = 29,
    VAL30 = 30,
    VAL31 = 31,
    VAL32 = 32,
    VAL33 = 33,
    VAL34 = 34,
    VAL35 = 35,
    VAL36 = 36,
    VAL37 = 37,
    VAL38 = 38,
    VAL39 = 39,
    VAL40 = 40,
    VAL41 = 41,
    VAL42 = 42,
    VAL43 = 43,
    VAL44 = 44,
    VAL45 = 45,
    VAL46 = 46,
    VAL47 = 47,
    VAL48 = 48,
    VAL49 = 49,
    VAL50 = 50,
    VAL51 = 51,
    VAL52 = 52,
    VAL53 = 53,
    VAL54 = 54,
    VAL55 = 55,
    VAL56 = 56,
    VAL57 = 57,
    VAL58 = 58,
    VAL59 = 59,
    VAL60 = 60,
    VAL61 = 61,
    VAL62 = 62,
    VAL63 = 63,
    VAL64 = 64,
    VAL65 = 65,
    VAL66 = 66,
    VAL67 = 67,
    VAL68 = 68,
    VAL69 = 69,
    VAL70 = 70,
    VAL71 = 71,
    VAL72 = 72,
    VAL73 = 73,
    VAL74 = 74,
    VAL75 = 75,
    VAL76 = 76,
    VAL77 = 77,
    VAL78 = 78,
    VAL79 = 79,
    VAL80 = 80,
    VAL81 = 81,
    VAL82 = 82,
    VAL83 = 83,
    VAL84 = 84,
    VAL85 = 85,
    VAL86 = 86,
    VAL87 = 87,
    VAL88 = 88,
    VAL89 = 89,
    VAL90 = 90,
    VAL91 = 91,
    VAL92 = 92,
    VAL93 = 93,
    VAL94 = 94,
    VAL95 = 95,
    VAL96 = 96,
    VAL97 = 97,
    VAL98 = 98,
    VAL99 = 99,
    VAL100 = 100,
    _RESERVED_65 = 101,
    _RESERVED_66 = 102,
    _RESERVED_67 = 103,
    _RESERVED_68 = 104,
    VAL105 = 105,
    VAL106 = 106,
    VAL107 = 107,
    VAL108 = 108,
    VAL109 = 109,
    VAL110 = 110,
    VAL111 = 111,
    VAL112 = 112,
    VAL113 = 113,
    VAL114 = 114,
    VAL115 = 115,
    VAL116 = 116,
    VAL117 = 117,
    VAL118 = 118,
    VAL119 = 119,
    VAL120 = 120,
    VAL121 = 121,
    VAL122 = 122,
    VAL123 = 123,
    VAL124 = 124,
    _RESERVED_7d = 125,
    _RESERVED_7e = 126,
    _RESERVED_7f = 127,
}

Variants

_RESERVED_0 = 0

VAL1 = 1

CT_INP0 input is selected

VAL2 = 2

CT_INP1 input is selected

VAL3 = 3

CT_INP2 input is selected

VAL4 = 4

CT_INP3 input is selected

VAL5 = 5

CT_INP4 input is selected

VAL6 = 6

CT_INP5 input is selected

VAL7 = 7

CT_INP6 input is selected

VAL8 = 8

CT_INP7 input is selected

VAL9 = 9

CT_INP8 input is selected

VAL10 = 10

CT_INP9 input is selected

VAL11 = 11

CT_INP10 input is selected

VAL12 = 12

CT_INP11 input is selected

VAL13 = 13

CT_INP12 input is selected

VAL14 = 14

CT_INP13 input is selected

VAL15 = 15

CT_INP14 input is selected

VAL16 = 16

CT_INP15 input is selected

VAL17 = 17

CT_INP16 input is selected

VAL18 = 18

CT_INP17 input is selected

VAL19 = 19

CT_INP18 input is selected

VAL20 = 20

CT_INP19 input is selected

VAL21 = 21

USB0 usb0 start of frame input is selected

VAL22 = 22

AOI0_OUT0 input is selected

VAL23 = 23

AOI0_OUT1 input is selected

VAL24 = 24

AOI0_OUT2 input is selected

VAL25 = 25

AOI0_OUT3 input is selected

VAL26 = 26

ADC0_tcomp[0]

VAL27 = 27

ADC0_tcomp[1]

VAL28 = 28

ADC0_tcomp[2]

VAL29 = 29

ADC0_tcomp[3] input is selected

VAL30 = 30

CMP0_OUT is selected

VAL31 = 31

CMP1_OUT is selected

VAL32 = 32

CMP2_OUT is selected

VAL33 = 33

CTimer0_MAT1 input is selected

VAL34 = 34

CTimer0_MAT2 input is selected

VAL35 = 35

CTimer0_MAT3 input is selected

VAL36 = 36

CTimer1_MAT1 input is selected

VAL37 = 37

CTimer1_MAT2 input is selected

VAL38 = 38

CTimer1_MAT3 input is selected

VAL39 = 39

QDC0_CMP_FLAG0 is selected

VAL40 = 40

QDC0_CMP_FLAG1 input is selected

VAL41 = 41

QDC0_CMP_FLAG2 input is selected

VAL42 = 42

QDC0_CMP_FLAG3 input is selected

VAL43 = 43

QDC0_POS_MATCH0 input is selected

VAL44 = 44

PWM0_SM0_MUX_TRIG0 input is selected

VAL45 = 45

PWM0_SM1_MUX_TRIG0 input is selected

VAL46 = 46

PWM0_SM2_MUX_TRIG0 input is selected

VAL47 = 47

PWM0_SM3_MUX_TRIG0 input is selected

VAL48 = 48

LPI2C0 Master End of Packet input is selected

VAL49 = 49

LPI2C0 Slave End of Packet input is selected

VAL50 = 50

LPI2C1 Master End of Packet input is selected

VAL51 = 51

LPI2C1 Slave End of Packet input is selected

VAL52 = 52

LPSPI0 End of Frame input is selected

VAL53 = 53

LPSPI0 Received Data Word input is selected

VAL54 = 54

LPSPI1 End of Frame input is selected

VAL55 = 55

LPSPI1 Received Data Word input is selected

VAL56 = 56

LPUART0 Received Data Word input is selected

VAL57 = 57

LPUART0 Transmitted Data Word input is selected

VAL58 = 58

LPUART0 Receive Line Idle input is selected

VAL59 = 59

LPUART1 Received Data Word input is selected

VAL60 = 60

LPUART1 Transmitted Data Word input is selected

VAL61 = 61

LPUART1 Receive Line Idle input is selected

VAL62 = 62

LPUART2 Received Data Word input is selected

VAL63 = 63

LPUART2 Transmitted Data Word input is selected

VAL64 = 64

LPUART2 Receive Line Idle input is selected

VAL65 = 65

LPUART3 Received Data Word input is selected

VAL66 = 66

LPUART3 Transmitted Data Word input is selected

VAL67 = 67

LPUART3 Receive Line Idle input is selected

VAL68 = 68

LPUART4 Received Data Word input is selected

VAL69 = 69

LPUART4 Transmitted Data Word input is selected

VAL70 = 70

LPUART4 Receive Line Idle input is selected

VAL71 = 71

AOI1_OUT0 input is selected

VAL72 = 72

AOI1_OUT1 input is selected

VAL73 = 73

AOI1_OUT2 input is selected

VAL74 = 74

AOI1_OUT3 input is selected

VAL75 = 75

ADC1_tcomp[0] input is selected

VAL76 = 76

ADC1_tcomp[1] input is selected

VAL77 = 77

ADC1_tcomp[2] input is selected

VAL78 = 78

ADC1_tcomp[3] input is selected

VAL79 = 79

CTimer2_MAT1 input is selected

VAL80 = 80

CTimer2_MAT2 input is selected

VAL81 = 81

CTimer2_MAT3 input is selected

VAL82 = 82

CTimer3_MAT1 input is selected

VAL83 = 83

CTimer3_MAT2 input is selected

VAL84 = 84

CTimer3_MAT3 input is selected

VAL85 = 85

QDC1_CMP_FLAG0 input is selected

VAL86 = 86

QDC1_CMP_FLAG1 input is selected

VAL87 = 87

QDC1_CMP_FLAG2 input is selected

VAL88 = 88

QDC1_CMP_FLAG3 input is selected

VAL89 = 89

QDC1_POS_MATCH0 input is selected

VAL90 = 90

PWM1_SM0_MUX_TRIG0 input is selected

VAL91 = 91

PWM1_SM1_MUX_TRIG0 input is selected

VAL92 = 92

PWM1_SM2_MUX_TRIG0 input is selected

VAL93 = 93

PWM1_SM2_MUX_TRIG0 input is selected

VAL94 = 94

LPI2C2 Master End of Packet input is selected

VAL95 = 95

LPI2C2 Slave End of Packet input is selected

VAL96 = 96

LPI2C3 Master End of Packet input is selected

VAL97 = 97

LPI2C3 Slave End of Packet input is selected

VAL98 = 98

LPUART5 Received Data Word input is selected

VAL99 = 99

LPUART5 Transmitted Data Word input is selected

VAL100 = 100

LPUART5 Receive Line Idle input is selected

_RESERVED_65 = 101

_RESERVED_66 = 102

_RESERVED_67 = 103

_RESERVED_68 = 104

VAL105 = 105

ADC2_tcomp[0] input is selected

VAL106 = 106

ADC2_tcomp[1] input is selected

VAL107 = 107

ADC2_tcomp[2] input is selected

VAL108 = 108

ADC2_tcomp[3] input is selected

VAL109 = 109

ADC3_tcomp[0] input is selected

VAL110 = 110

ADC3_tcomp[1] input is selected

VAL111 = 111

ADC3_tcomp[2] input is selected

VAL112 = 112

ADC3_tcomp[3] input is selected

VAL113 = 113

TRIG_IN0 input is selected

VAL114 = 114

TRIG_IN1 input is selected

VAL115 = 115

TRIG_IN2 input is selected

VAL116 = 116

TRIG_IN3 input is selected

VAL117 = 117

TRIG_IN4 input is selected

VAL118 = 118

TRIG_IN5 input is selected

VAL119 = 119

TRIG_IN6 input is selected

VAL120 = 120

TRIG_IN7 input is selected

VAL121 = 121

TRIG_IN8 input is selected

VAL122 = 122

TRIG_IN9 input is selected

VAL123 = 123

TRIG_IN10 input is selected

VAL124 = 124

TRIG_IN11 input is selected

_RESERVED_7d = 125

_RESERVED_7e = 126

_RESERVED_7f = 127

Implementations

impl Timer4trigInp

pub const fn from_bits(val: u8) -> Timer4trigInp

pub const fn to_bits(self) -> u8

Trait Implementations

impl Clone for Timer4trigInp

fn clone(&self) -> Timer4trigInp

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Timer4trigInp

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<Timer4trigInp> for u8

fn from(val: Timer4trigInp) -> u8

Converts to this type from the input type.

impl From<u8> for Timer4trigInp

fn from(val: u8) -> Timer4trigInp

Converts to this type from the input type.

impl Ord for Timer4trigInp

fn cmp(&self, other: &Timer4trigInp) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized,

Restrict a value to a certain interval.

impl PartialEq for Timer4trigInp

fn eq(&self, other: &Timer4trigInp) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for Timer4trigInp

fn partial_cmp(&self, other: &Timer4trigInp) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for Timer4trigInp

impl Eq for Timer4trigInp

impl StructuralPartialEq for Timer4trigInp