Expand description
Peripheral access API (generated using chiptool v0.1.0 (e890244 2026-11-05))
Structs§
- Cr
- Control
- Ier
- Interrupt Enable
- Lr
- One-way lock bits until VBAT POR or TDET software reset. Locked writes are ignored without bus error. Locking CR disables software reset; locking LR itself prevents further lock changes.
- Pgfr
- Pin Glitch Filter
- Ppr
- Pin Polarity
- Sr
- Status
- Tdet
- Digital tamper. Word writes only. TSR writes create tamper events. SR table defaults contradict the reset-condition prose and are not confirmed post-reset observations. No device operations are performed by this model.
- Ter
- Tamper Enable
- Tsr
- Tamper Seconds
Enums§
- CrDen
- CrDistam
- CrSwr
- CrTfsr
- CrUm
- IerDtie
- IerTiie4
- IerTiie5
- IerTiie6
- IerTiie7
- IerTiie9
- IerTiie10
- IerTpie0
- IerTpie1
- IerTpie2
- IerTpie3
- IerTpie4
- IerTpie5
- LrCrl
- LrGfl0
- LrGfl1
- LrGfl2
- LrGfl3
- LrGfl4
- LrGfl5
- LrIel
- LrLrl
- LrPpl
- LrSrl
- LrTel
- LrTsl
- PgfrGfe
- PgfrGfp
- PgfrTpe
- PgfrTps
- Pgfr
Tpsf - Pgfr
Tpsw - PprTpid0
- PprTpid1
- PprTpid2
- PprTpid3
- PprTpid4
- PprTpid5
- PprTpp0
- PprTpp1
- PprTpp2
- PprTpp3
- PprTpp4
- PprTpp5
- SrDtf
- SrTaf
- SrTif4
- SrTif5
- SrTif6
- SrTif7
- SrTif9
- SrTif10
- SrTpf0
- SrTpf1
- SrTpf2
- SrTpf3
- SrTpf4
- SrTpf5
- TerTie4
- TerTie5
- TerTie6
- TerTie7
- TerTie9
- TerTie10
- TerTpe0
- TerTpe1
- TerTpe2
- TerTpe3
- TerTpe4
- TerTpe5