nxp-pac

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Module pkc

Module pkc 

Source
Expand description

Peripheral access API (generated using chiptool v0.1.0 (e890244 2026-11-05))

Structs§

Pkc
A5 PKC. MCDATA, VERSION and MODULE_ID are absent from the documented map and intentionally not exposed.
PkcAccessErr
Access Error.
PkcAccessErrClr
Clear Access Error.
PkcCfg
Configuration register.
PkcCtrl
PKC control. Clear RESET in an earlier write and poll it cleared before setting GO. Poll RESET/STOP after modifications; STOP must already be disabled before changing RESET. Invalid combinations trigger security alarms.
PkcIntClrEnable
Interrupt enable clear.
PkcIntClrStatus
Interrupt status clear.
PkcIntEnable
Interrupt enable.
PkcIntSetEnable
Interrupt enable set.
PkcIntSetStatus
Interrupt status set.
PkcIntStatus
Interrupt status.
PkcLen1
Length register, parameter set 1.
PkcLen2
Length register, parameter set 2.
PkcMode1
Mode register, parameter set 1.
PkcMode2
Mode register, parameter set 2.
PkcShared
Public-key coprocessor raw register interface. Invalid or unimplemented accesses raise a security alert and reset PKC; system response can include a global reset. No accesses are performed automatically.
PkcSoftRst
Software reset.
PkcStatus
Status Register.
PkcUlen
Universal pointer length. Do not update while GOANY=1 during an L2 calculation. Hardware does not reject all such updates; they may corrupt the result or raise a security alarm. Hardware decrements ULEN for each processed FUP entry. Reaching zero clears GOANY at the start of the final calculation; completion is indicated by ACTIV clearing.
PkcUptr
Universal pointer FUP program. Do not update while GOANY=1 during an L2 calculation. Hardware does not reject all such updates; they may corrupt the result or raise a security alarm. Hardware increments UPTR by six for each processed FUP program entry.
PkcUptrt
Universal pointer FUP table. Do not update while GOANY=1 during an L2 calculation. Hardware does not reject all such updates; they may corrupt the result or raise a security alarm. UPTRT is not automatically updated by hardware.
PkcXyptr1
X+Y pointer register, parameter set 1.
PkcXyptr2
X+Y pointer register, parameter set 2.
PkcZrptr1
Z+R pointer register, parameter set 1.
PkcZrptr2
Z+R pointer register, parameter set 2.

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