Enumsยง
- Adc0
- Adc1
- AhbSecure
Ctrl MemRule0 Rule0 - AhbSecure
Ctrl MemRule0 Rule1 - AhbSecure
Ctrl MemRule0 Rule2 - AhbSecure
Ctrl MemRule0 Rule3 - Aips
Bridge Group1 MemRule1 Usb1 - Aoi0
- ApbPeripheral
Group0 MemRule1 Smartdma - Can0
Region0 - Can0
Region1 - Can0
Region2 - Can0
Region3 - Can1
Region0 - Can1
Region1 - Can1
Region2 - Can1
Region3 - Cdog0
- Cdog1
- Cmc
- Cmp0
- Crc0
- Ctimer0
- Ctimer1
- Ctimer2
- Ctimer3
- Ctimer4
- Dac0
- Dac1
- Debug
Mailbox - Dgdet0
- Dma0Ch0
- Dma0Ch1
- Dma0Ch2
- Dma0Ch3
- Dma0Ch4
- Dma0Ch5
- Dma0Ch6
- Dma0Ch7
- Dma0Ch8
- Dma0Ch9
- Dma0
Ch10 - Dma0
Ch11 - Dma0Mp
- Dma1Ch0
- Dma1Ch1
- Dma1Ch2
- Dma1Ch3
- Dma1Mp
- ESpi
- Eim
- Enet00
- Enet01
- Erm
- Ewm0
- Flash00
MemRule Rule0 - Flash00
MemRule Rule1 - Flash00
MemRule Rule2 - Flash00
MemRule Rule3 - Flash00
MemRule Rule4 - Flash00
MemRule Rule5 - Flash00
MemRule Rule6 - Flash00
MemRule Rule7 - Flash01
MemRule Rule0 - Flash01
MemRule Rule1 - Flash01
MemRule Rule2 - Flash01
MemRule Rule3 - Flash01
MemRule Rule4 - Flash01
MemRule Rule5 - Flash01
MemRule Rule6 - Flash01
MemRule Rule7 - Flash02
MemRule Rule0 - Flash02
MemRule Rule1 - Flash02
MemRule Rule2 - Flash02
MemRule Rule3 - Flash03
MemRule Rule0 - Flash03
MemRule Rule1 - Flash03
MemRule Rule2 - Flash03
MemRule Rule3 - Flexio
- Flexspi0
- Flexspi0
Region0 MemRule Rule0 - Flexspi0
Region0 MemRule Rule1 - Flexspi0
Region0 MemRule Rule2 - Flexspi0
Region0 MemRule Rule3 - Flexspi0
Region0 MemRule Rule4 - Flexspi0
Region0 MemRule Rule5 - Flexspi0
Region0 MemRule Rule6 - Flexspi0
Region0 MemRule Rule7 - Flexspi0
Region MemRule Rule0 - Flexspi0
Region MemRule Rule1 - Flexspi0
Region MemRule Rule2 - Flexspi0
Region MemRule Rule3 - Fmc
- Fmu
- Freqme
- Glikey0
- Gpio0
- Gpio0
Alias - Gpio1
- Gpio2
- Gpio3
- Gpio4
- Gpio5
- Gpio1
Alias - Gpio2
Alias - Gpio3
Alias - Gpio4
Alias - Gpio5
Alias - I3c0
- I3c1
- I3c2
- I3c3
- Inputmux
- Itrc0
- Lock
NsMpu - Lock
NsVtor - LockS
Mpu - LockS
Vtaircr - LockSau
- Lpi2c0
- Lpi2c1
- Lpi2c2
- Lpi2c3
- Lpi2c4
- Lpspi0
- Lpspi1
- Lpspi2
- Lpspi3
- Lpspi4
- Lpspi5
- Lptmr
- Lpuart0
- Lpuart1
- Lpuart2
- Lpuart3
- Lpuart4
- Lpuart5
- Master
SecAnti PolReg Dma0 - Master
SecAnti PolReg Dma1 - Master
SecAnti PolReg Enet0 - Master
SecAnti PolReg Pkc - Master
SecAnti PolReg Smartdma - Master
SecAnti PolReg Usb1 - Master
SecLevel Dma0 - Master
SecLevel Dma1 - Master
SecLevel Enet0 - Master
SecLevel Pkc - Master
SecLevel Smartdma - Master
SecLevel Usb1 - Mau0
- Mbc
- Misc
Ctrl DpReg Disable Strict Mode - Misc
Ctrl DpReg Disable Violation Abort - Misc
Ctrl DpReg Enable NsPriv Check - Misc
Ctrl DpReg EnableS Priv Check - Misc
Ctrl DpReg Enable Secure Checking - Misc
Ctrl DpReg Idau AllNs - Misc
Ctrl DpReg Write Lock - Misc
Ctrl RegDisable Strict Mode - Misc
Ctrl RegDisable Violation Abort - Misc
Ctrl RegEnable NsPriv Check - Misc
Ctrl RegEnableS Priv Check - Misc
Ctrl RegEnable Secure Checking - Misc
Ctrl RegIdau AllNs - Misc
Ctrl RegWrite Lock - Ostimer
- Pkc0
- Port0
- Port1
- Port2
- Port3
- Port4
- Port5
- Rama
MemRule Rule0 - Rama
MemRule Rule1 - Rama
MemRule Rule2 - Rama
MemRule Rule3 - Rama
MemRule Rule4 - Rama
MemRule Rule5 - Rama
MemRule Rule6 - Rama
MemRule Rule7 - Ramb
MemRule Rule0 - Ramb
MemRule Rule1 - Ramb
MemRule Rule2 - Ramb
MemRule Rule3 - Ramb
MemRule Rule4 - Ramb
MemRule Rule5 - Ramb
MemRule Rule6 - Ramb
MemRule Rule7 - Ramx
MemRule Rule0 - Ramx
MemRule Rule1 - Ramx
MemRule Rule2 - Ramx
MemRule Rule3 - Ramx
MemRule Rule4 - Ramx
MemRule Rule5 - Ramx
MemRule Rule6 - Ramx
MemRule Rule7 - RomMem
Rule Rule0 - RomMem
Rule Rule1 - RomMem
Rule Rule2 - RomMem
Rule Rule3 - RomMem
Rule Rule4 - RomMem
Rule Rule5 - RomMem
Rule Rule6 - RomMem
Rule Rule7 - Romcp
- Rtc0
- Scg
- SecVio
Info Data Access - SecVio
Info Master - SecVio
Info Write - Seccon
- Sgi0
- Spc
- SpiFileter0
- Syscon
- T1s0
- Tdet0
- Trng0
- Tsi0
- Udf0
- Usb1Phy
- Utick
- Vbat
- Vref0
- Wake
Timer - Wuu
- Wwdt0
- Wwdt1