#[repr(transparent)]pub struct Status(pub u32);Expand description
ITRC outputs and IN0 to IN15 Status
Tuple Fields§
§0: u32Implementations§
Source§impl Status
impl Status
Sourcepub const fn in0_status(&self) -> bool
pub const fn in0_status(&self) -> bool
DGDET0 interrupt.
Sourcepub const fn set_in0_status(&mut self, val: bool)
pub const fn set_in0_status(&mut self, val: bool)
DGDET0 interrupt.
Sourcepub const fn in1_status(&self) -> bool
pub const fn in1_status(&self) -> bool
TDET tamper output.
Sourcepub const fn set_in1_status(&mut self, val: bool)
pub const fn set_in1_status(&mut self, val: bool)
TDET tamper output.
Sourcepub const fn in2_status(&self) -> bool
pub const fn in2_status(&self) -> bool
Code Watchdog 0 interrupt.
Sourcepub const fn set_in2_status(&mut self, val: bool)
pub const fn set_in2_status(&mut self, val: bool)
Code Watchdog 0 interrupt.
Sourcepub const fn in4_status(&self) -> bool
pub const fn in4_status(&self) -> bool
SPC VDD_CORE_LVD detect.
Sourcepub const fn set_in4_status(&mut self, val: bool)
pub const fn set_in4_status(&mut self, val: bool)
SPC VDD_CORE_LVD detect.
Sourcepub const fn in5_status(&self) -> bool
pub const fn in5_status(&self) -> bool
Watch Dog timer event occurred.
Sourcepub const fn set_in5_status(&mut self, val: bool)
pub const fn set_in5_status(&mut self, val: bool)
Watch Dog timer event occurred.
Sourcepub const fn in6_status(&self) -> bool
pub const fn in6_status(&self) -> bool
Flash ECC mismatch event occurred.
Sourcepub const fn set_in6_status(&mut self, val: bool)
pub const fn set_in6_status(&mut self, val: bool)
Flash ECC mismatch event occurred.
Sourcepub const fn in7_status(&self) -> bool
pub const fn in7_status(&self) -> bool
Secure violation interrupt (Memory Block Checker (MBC) interrupt or secure AHB (AHBSC) matrix violation, and SYSCON XEN violation).
Sourcepub const fn set_in7_status(&mut self, val: bool)
pub const fn set_in7_status(&mut self, val: bool)
Secure violation interrupt (Memory Block Checker (MBC) interrupt or secure AHB (AHBSC) matrix violation, and SYSCON XEN violation).
Sourcepub const fn in9_status(&self) -> bool
pub const fn in9_status(&self) -> bool
SPC VDD_CORE glitch detect event occurred.
Sourcepub const fn set_in9_status(&mut self, val: bool)
pub const fn set_in9_status(&mut self, val: bool)
SPC VDD_CORE glitch detect event occurred.
Sourcepub const fn in10_status(&self) -> bool
pub const fn in10_status(&self) -> bool
PKC module detected an error event.
Sourcepub const fn set_in10_status(&mut self, val: bool)
pub const fn set_in10_status(&mut self, val: bool)
PKC module detected an error event.
Sourcepub const fn in11_status(&self) -> bool
pub const fn in11_status(&self) -> bool
Code Watchdog 1 interrupt.
Sourcepub const fn set_in11_status(&mut self, val: bool)
pub const fn set_in11_status(&mut self, val: bool)
Code Watchdog 1 interrupt.
Sourcepub const fn in112_status(&self) -> bool
pub const fn in112_status(&self) -> bool
Watchdog 1 timer event interrupt.
Sourcepub const fn set_in112_status(&mut self, val: bool)
pub const fn set_in112_status(&mut self, val: bool)
Watchdog 1 timer event interrupt.
Sourcepub const fn in113_status(&self) -> bool
pub const fn in113_status(&self) -> bool
FREQME out of range status output.
Sourcepub const fn set_in113_status(&mut self, val: bool)
pub const fn set_in113_status(&mut self, val: bool)
FREQME out of range status output.
Sourcepub const fn in14_status(&self) -> bool
pub const fn in14_status(&self) -> bool
Software event 0 occurred.
Sourcepub const fn set_in14_status(&mut self, val: bool)
pub const fn set_in14_status(&mut self, val: bool)
Software event 0 occurred.
Sourcepub const fn in15_status(&self) -> bool
pub const fn in15_status(&self) -> bool
Software event 1 occurred.
Sourcepub const fn set_in15_status(&mut self, val: bool)
pub const fn set_in15_status(&mut self, val: bool)
Software event 1 occurred.
Sourcepub const fn out0_status(&self) -> bool
pub const fn out0_status(&self) -> bool
ITRC triggered ITRC_IRQ output.
Sourcepub const fn set_out0_status(&mut self, val: bool)
pub const fn set_out0_status(&mut self, val: bool)
ITRC triggered ITRC_IRQ output.
Sourcepub const fn out1_status(&self) -> bool
pub const fn out1_status(&self) -> bool
ITRC triggered SGI_UDF_RESET.
Sourcepub const fn set_out1_status(&mut self, val: bool)
pub const fn set_out1_status(&mut self, val: bool)
ITRC triggered SGI_UDF_RESET.
Sourcepub const fn out2_status(&self) -> bool
pub const fn out2_status(&self) -> bool
OUT2_STATUS can initiate PoR reset. CORE domain is reset completely. System domain must be reset completely, except the registers in SPC which reset by PoR. VBAT domain is not affected. .
Sourcepub const fn set_out2_status(&mut self, val: bool)
pub const fn set_out2_status(&mut self, val: bool)
OUT2_STATUS can initiate PoR reset. CORE domain is reset completely. System domain must be reset completely, except the registers in SPC which reset by PoR. VBAT domain is not affected. .
Sourcepub const fn out3_status(&self) -> bool
pub const fn out3_status(&self) -> bool
ITRC triggered RAM_ZEROIZE to clear retention and PKC RAM contents.
Sourcepub const fn set_out3_status(&mut self, val: bool)
pub const fn set_out3_status(&mut self, val: bool)
ITRC triggered RAM_ZEROIZE to clear retention and PKC RAM contents.
Sourcepub const fn out4_status(&self) -> bool
pub const fn out4_status(&self) -> bool
ITRC triggered CHIP_RESET to reset the chip after all other response process finished.
Sourcepub const fn set_out4_status(&mut self, val: bool)
pub const fn set_out4_status(&mut self, val: bool)
ITRC triggered CHIP_RESET to reset the chip after all other response process finished.
Sourcepub const fn out5_status(&self) -> bool
pub const fn out5_status(&self) -> bool
ITRC triggered TMPR_OUT0 internal signal connected to various on-chip multiplexers.
Sourcepub const fn set_out5_status(&mut self, val: bool)
pub const fn set_out5_status(&mut self, val: bool)
ITRC triggered TMPR_OUT0 internal signal connected to various on-chip multiplexers.
Sourcepub const fn out6_status(&self) -> bool
pub const fn out6_status(&self) -> bool
ITRC triggered TMPR_OUT1 internal signal connected to various on-chip multiplexers.
Sourcepub const fn set_out6_status(&mut self, val: bool)
pub const fn set_out6_status(&mut self, val: bool)
ITRC triggered TMPR_OUT1 internal signal connected to various on-chip multiplexers.