#[repr(u8)]pub enum Icr0Irqc {
Show 16 variants
IRQC0 = 0,
IRQC1 = 1,
IRQC2 = 2,
IRQC3 = 3,
_RESERVED_4 = 4,
IRQC5 = 5,
IRQC6 = 6,
IRQC7 = 7,
IRQC8 = 8,
IRQC9 = 9,
IRQC10 = 10,
IRQC11 = 11,
IRQC12 = 12,
IRQC13 = 13,
IRQC14 = 14,
_RESERVED_f = 15,
}Variants§
IRQC0 = 0
ISF is disabled.
IRQC1 = 1
ISF and DMA request on rising edge.
IRQC2 = 2
ISF and DMA request on falling edge.
IRQC3 = 3
ISF and DMA request on either edge.
_RESERVED_4 = 4
IRQC5 = 5
ISF sets on rising edge.
IRQC6 = 6
ISF sets on falling edge.
IRQC7 = 7
ISF sets on either edge.
IRQC8 = 8
ISF and interrupt when logic 0.
IRQC9 = 9
ISF and interrupt on rising edge.
IRQC10 = 10
ISF and interrupt on falling edge.
IRQC11 = 11
ISF and Interrupt on either edge.
IRQC12 = 12
ISF and interrupt when logic 1.
IRQC13 = 13
Enable active-high trigger output; ISF on rising edge (pin state is ORed with other enabled triggers to generate the output trigger for use by other peripherals).
IRQC14 = 14
Enable active-low trigger output; ISF on falling edge (pin state is inverted and ORed with other enabled triggers to generate the output trigger for use by other peripherals).
_RESERVED_f = 15
Implementations§
Trait Implementations§
Source§impl Ord for Icr0Irqc
impl Ord for Icr0Irqc
Source§impl PartialOrd for Icr0Irqc
impl PartialOrd for Icr0Irqc
impl Copy for Icr0Irqc
impl Eq for Icr0Irqc
impl StructuralPartialEq for Icr0Irqc
Auto Trait Implementations§
impl Freeze for Icr0Irqc
impl RefUnwindSafe for Icr0Irqc
impl Send for Icr0Irqc
impl Sync for Icr0Irqc
impl Unpin for Icr0Irqc
impl UnwindSafe for Icr0Irqc
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more