Enum Sct0InmuxInp 

#[repr(u8)]
pub enum Sct0InmuxInp {
    VAL0 = 0,
    VAL1 = 1,
    VAL2 = 2,
    VAL3 = 3,
    VAL4 = 4,
    VAL5 = 5,
    VAL6 = 6,
    VAL7 = 7,
    VAL8 = 8,
    VAL9 = 9,
    VAL10 = 10,
    VAL11 = 11,
    VAL12 = 12,
    VAL13 = 13,
    VAL14 = 14,
    VAL15 = 15,
    VAL16 = 16,
    VAL17 = 17,
    VAL18 = 18,
    VAL19 = 19,
    VAL20 = 20,
    VAL21 = 21,
    _RESERVED_16 = 22,
    VAL23 = 23,
    VAL24 = 24,
    VAL25 = 25,
    VAL26 = 26,
    VAL27 = 27,
    VAL28 = 28,
    VAL29 = 29,
    VAL30 = 30,
    VAL31 = 31,
    VAL32 = 32,
    VAL33 = 33,
    VAL34 = 34,
    VAL35 = 35,
    VAL36 = 36,
    VAL37 = 37,
    VAL38 = 38,
    VAL39 = 39,
    VAL40 = 40,
    VAL41 = 41,
    VAL42 = 42,
    VAL43 = 43,
    VAL44 = 44,
    VAL45 = 45,
    VAL46 = 46,
    VAL47 = 47,
    VAL48 = 48,
    VAL49 = 49,
    VAL50 = 50,
    VAL51 = 51,
    VAL52 = 52,
    VAL53 = 53,
    VAL54 = 54,
    VAL55 = 55,
    VAL56 = 56,
    VAL57 = 57,
    _RESERVED_3a = 58,
    _RESERVED_3b = 59,
    VAL60 = 60,
    VAL61 = 61,
    VAL62 = 62,
    VAL63 = 63,
    VAL64 = 64,
    VAL65 = 65,
    VAL66 = 66,
    VAL67 = 67,
    VAL68 = 68,
    VAL69 = 69,
    VAL70 = 70,
    VAL71 = 71,
    VAL72 = 72,
    VAL73 = 73,
    VAL74 = 74,
    VAL75 = 75,
    VAL76 = 76,
    _RESERVED_4d = 77,
    _RESERVED_4e = 78,
    _RESERVED_4f = 79,
    _RESERVED_50 = 80,
    _RESERVED_51 = 81,
    _RESERVED_52 = 82,
    _RESERVED_53 = 83,
    _RESERVED_54 = 84,
    _RESERVED_55 = 85,
    _RESERVED_56 = 86,
    _RESERVED_57 = 87,
    _RESERVED_58 = 88,
    _RESERVED_59 = 89,
    _RESERVED_5a = 90,
    _RESERVED_5b = 91,
    _RESERVED_5c = 92,
    _RESERVED_5d = 93,
    _RESERVED_5e = 94,
    _RESERVED_5f = 95,
    _RESERVED_60 = 96,
    _RESERVED_61 = 97,
    _RESERVED_62 = 98,
    _RESERVED_63 = 99,
    _RESERVED_64 = 100,
    _RESERVED_65 = 101,
    _RESERVED_66 = 102,
    _RESERVED_67 = 103,
    _RESERVED_68 = 104,
    _RESERVED_69 = 105,
    _RESERVED_6a = 106,
    _RESERVED_6b = 107,
    _RESERVED_6c = 108,
    _RESERVED_6d = 109,
    _RESERVED_6e = 110,
    _RESERVED_6f = 111,
    _RESERVED_70 = 112,
    _RESERVED_71 = 113,
    _RESERVED_72 = 114,
    _RESERVED_73 = 115,
    _RESERVED_74 = 116,
    _RESERVED_75 = 117,
    _RESERVED_76 = 118,
    _RESERVED_77 = 119,
    _RESERVED_78 = 120,
    _RESERVED_79 = 121,
    _RESERVED_7a = 122,
    _RESERVED_7b = 123,
    _RESERVED_7c = 124,
    _RESERVED_7d = 125,
    _RESERVED_7e = 126,
    _RESERVED_7f = 127,
}

Variants

VAL0 = 0

SCT0_IN0 input is selected

VAL1 = 1

SCT0_IN1 input is selected

VAL2 = 2

SCT0_IN2 input is selected

VAL3 = 3

SCT0_IN3 input is selected

VAL4 = 4

SCT0_IN4 input is selected

VAL5 = 5

SCT0_IN5 input is selected

VAL6 = 6

SCT0_IN6 input is selected

VAL7 = 7

SCT0_IN7 input is selected

VAL8 = 8

CTIMER0_MAT0 input is selected

VAL9 = 9

CTIMER1_MAT0 input is selected

VAL10 = 10

CTIMER2_MAT0 input is selected

VAL11 = 11

CTIMER3_MAT0 input is selected

VAL12 = 12

CTIMER4_MAT0 input is selected

VAL13 = 13

ADC0 ADC0_IRQ input is selected

VAL14 = 14

PINT GPIO_INT_BMAT input is selected

VAL15 = 15

usb0 start of frame input is selected

VAL16 = 16

usb1 start of frame input is selected

VAL17 = 17

SINC Filter CH0 Conversion Complete input is selected

VAL18 = 18

SINC Filter CH1 Conversion Complete input is selected

VAL19 = 19

SINC Filter CH2 Conversion Complete input is selected

VAL20 = 20

SINC Filter CH3 Conversion Complete input is selected

VAL21 = 21

SINC Filter CH4 Conversion Complete input is selected

_RESERVED_16 = 22

VAL23 = 23

DEBUG_HALTED input is selected

VAL24 = 24

ADC1_IRQ input is selected

VAL25 = 25

ADC0_tcomp[0] input is selected

VAL26 = 26

ADC0_tcomp[1] input is selected

VAL27 = 27

ADC0_tcomp[2] input is selected

VAL28 = 28

ADC0_tcomp[3] input is selected

VAL29 = 29

ADC1_tcomp[0] input is selected

VAL30 = 30

ADC1_tcomp[1] input is selected

VAL31 = 31

ADC1_tcomp[2] input is selected

VAL32 = 32

ADC1_tcomp[3] input is selected

VAL33 = 33

CMP0_OUT input is selected

VAL34 = 34

CMP1_OUT input is selected

VAL35 = 35

CMP2_OUT input is selected

VAL36 = 36

PWM0_SM0_MUX_TRIG0/PWM0_SM0_MUX_TRIG1 input is selected

VAL37 = 37

PWM0_SM1_MUX_TRIG0/PWM0_SM1_MUX_TRIG1 input is selected

VAL38 = 38

PWM0_SM2_MUX_TRIG0/PWM0_SM2_MUX_TRIG1 input is selected

VAL39 = 39

PWM0_SM3_MUX_TRIG0/PWM0_SM3_MUX_TRIG1 input is selected

VAL40 = 40

PWM1_SM0_MUX_TRIG0/PWM1_SM0_MUX_TRIG1 input is selected

VAL41 = 41

PWM1_SM1_MUX_TRIG0/PWM1_SM1_MUX_TRIG1 input is selected

VAL42 = 42

PWM1_SM2_MUX_TRIG0/PWM1_SM2_MUX_TRIG1 input is selected

VAL43 = 43

PWM1_SM3_MUX_TRIG0/PWM1_SM3_MUX_TRIG1 input is selected

VAL44 = 44

QDC0_CMP/POS_MATCH input is selected

VAL45 = 45

QDC1_CMP/POS_MATCH input is selected

VAL46 = 46

EVTG_OUT0A input is selected

VAL47 = 47

EVTG_OUT0B input is selected

VAL48 = 48

EVTG_OUT1A input is selected

VAL49 = 49

EVTG_OUT1B input is selected

VAL50 = 50

EVTG_OUT2A input is selected

VAL51 = 51

EVTG_OUT2B input is selected

VAL52 = 52

EVTG_OUT3A input is selected

VAL53 = 53

EVTG_OUT3B input is selected

VAL54 = 54

FC3_P0 (SDO, SDA) input is selected

VAL55 = 55

FC3_P1 (SCK, TXD, SCL) input is selected

VAL56 = 56

FC3_P2 (RTS, SCLS, TXD) input is selected

VAL57 = 57

FC3_P3 (PCS[0], CTS, SDAS) input is selected

_RESERVED_3a = 58

_RESERVED_3b = 59

VAL60 = 60

LP_FLEXCOMM0 trig 0 (lpuart_trg_txword) input is selected

VAL61 = 61

LP_FLEXCOMM0 trig 1 (lpuart_trg_rxword) input is selected

VAL62 = 62

LP_FLEXCOMM0 trig 2 (lpuart_trg_rxidle) input is selected

VAL63 = 63

LP_FLEXCOMM1 trig 0 input is selected

VAL64 = 64

LP_FLEXCOMM1 trig 1 input is selected

VAL65 = 65

LP_FLEXCOMM1 trig 2 input is selected

VAL66 = 66

LP_FLEXCOMM2 trig 0 input is selected

VAL67 = 67

LP_FLEXCOMM2 trig 1 input is selected

VAL68 = 68

LP_FLEXCOMM2 trig 2 input is selected

VAL69 = 69

LP_FLEXCOMM3 trig 0 input is selected

VAL70 = 70

LP_FLEXCOMM3 trig 1 input is selected

VAL71 = 71

LP_FLEXCOMM3 trig 2 input is selected

VAL72 = 72

LP_FLEXCOMM3 trig 3 input is selected

VAL73 = 73

SAI0 TX BCLK input is selected

VAL74 = 74

SAI0 RX BCLK input is selected

VAL75 = 75

SAI1 TX BCLK input is selected

VAL76 = 76

SAI1 RX BCLK input is selected

_RESERVED_4d = 77

_RESERVED_4e = 78

_RESERVED_4f = 79

_RESERVED_50 = 80

_RESERVED_51 = 81

_RESERVED_52 = 82

_RESERVED_53 = 83

_RESERVED_54 = 84

_RESERVED_55 = 85

_RESERVED_56 = 86

_RESERVED_57 = 87

_RESERVED_58 = 88

_RESERVED_59 = 89

_RESERVED_5a = 90

_RESERVED_5b = 91

_RESERVED_5c = 92

_RESERVED_5d = 93

_RESERVED_5e = 94

_RESERVED_5f = 95

_RESERVED_60 = 96

_RESERVED_61 = 97

_RESERVED_62 = 98

_RESERVED_63 = 99

_RESERVED_64 = 100

_RESERVED_65 = 101

_RESERVED_66 = 102

_RESERVED_67 = 103

_RESERVED_68 = 104

_RESERVED_69 = 105

_RESERVED_6a = 106

_RESERVED_6b = 107

_RESERVED_6c = 108

_RESERVED_6d = 109

_RESERVED_6e = 110

_RESERVED_6f = 111

_RESERVED_70 = 112

_RESERVED_71 = 113

_RESERVED_72 = 114

_RESERVED_73 = 115

_RESERVED_74 = 116

_RESERVED_75 = 117

_RESERVED_76 = 118

_RESERVED_77 = 119

_RESERVED_78 = 120

_RESERVED_79 = 121

_RESERVED_7a = 122

_RESERVED_7b = 123

_RESERVED_7c = 124

_RESERVED_7d = 125

_RESERVED_7e = 126

_RESERVED_7f = 127

Implementations

impl Sct0InmuxInp

pub const fn from_bits(val: u8) -> Sct0InmuxInp

pub const fn to_bits(self) -> u8

Trait Implementations

impl Clone for Sct0InmuxInp

fn clone(&self) -> Sct0InmuxInp

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Sct0InmuxInp

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<Sct0InmuxInp> for u8

fn from(val: Sct0InmuxInp) -> u8

Converts to this type from the input type.

impl From<u8> for Sct0InmuxInp

fn from(val: u8) -> Sct0InmuxInp

Converts to this type from the input type.

impl Ord for Sct0InmuxInp

fn cmp(&self, other: &Sct0InmuxInp) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized,

Restrict a value to a certain interval.

impl PartialEq for Sct0InmuxInp

fn eq(&self, other: &Sct0InmuxInp) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for Sct0InmuxInp

fn partial_cmp(&self, other: &Sct0InmuxInp) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for Sct0InmuxInp

impl Eq for Sct0InmuxInp

impl StructuralPartialEq for Sct0InmuxInp